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Ravi Namballa: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Ravi Namballa, Nagarajan Ranganathan, Abdel Ejnioui
    Control and Data Flow Graph Extraction for High-Level Synthesis. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2004, pp:192- [Conf]
  2. Nagarajan Ranganathan, Ravi Namballa, Narender Hanchate
    CHESS: A Comprehensive Tool for CDFG Extraction and Synthesis of Low Power Designs from VHDL. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2006, pp:329-334 [Conf]
  3. Saraju P. Mohanty, Nagarajan Ranganathan, Ravi Namballa
    VLSI Implementation of Visible Watermarking for a Secure Digital Still Camera Design. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2004, pp:1063-0 [Conf]
  4. Saraju P. Mohanty, Nagarajan Ranganathan, Ravi Namballa
    A VLSI architecture for watermarking in a secure still digital camera (S/sup 2/DC) design. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2005, v:13, n:7, pp:808-818 [Journal]
  5. Saraju P. Mohanty, Nagarajan Ranganathan, Ravi Namballa
    A VLSI architecture for visible watermarking in a secure still digital camera (S/sup 2/DC) design (Corrected)*. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2005, v:13, n:8, pp:1002-1012 [Journal]

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