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William H. McAnney:
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Publications of Author
- Paul H. Bardell, William H. McAnney
Self-Testing of Multichip Logic Modules. [Citation Graph (0, 0)][DBLP] ITC, 1982, pp:200-204 [Conf]
- Paul H. Bardell, William H. McAnney
Parallel Pseudorandom Sequences for Built-In Test. [Citation Graph (0, 0)][DBLP] ITC, 1984, pp:302-308 [Conf]
- Paul H. Bardell, William H. McAnney
Self-Test of Random Access Memories. [Citation Graph (0, 0)][DBLP] ITC, 1985, pp:352-355 [Conf]
- William H. McAnney, Paul H. Bardell, V. P. Gupta
Random Testing for Stuck-At Storage Cells in an Embedded Memory. [Citation Graph (0, 0)][DBLP] ITC, 1984, pp:157-166 [Conf]
- William H. McAnney, Jacob Savir
Built-In Checking of the Correct Self-Test Signature. [Citation Graph (0, 0)][DBLP] ITC, 1986, pp:54-59 [Conf]
- Jacob Savir, William H. McAnney
Random Pattern Testability of Delay Faults. [Citation Graph (0, 0)][DBLP] ITC, 1986, pp:263-273 [Conf]
- Jacob Savir, William H. McAnney
Identification of Failing Tests with Cycling Registers. [Citation Graph (0, 0)][DBLP] ITC, 1988, pp:322-328 [Conf]
- Jacob Savir, William H. McAnney, Salvatore R. Vecchio
Random Pattern Testing for Data-Line Faults in an Embedded Multiport Memory. [Citation Graph (0, 0)][DBLP] ITC, 1985, pp:100-105 [Conf]
- Jacob Savir, William H. McAnney, Salvatore R. Vecchio
Random Pattern Testing for Address-Line Faults in an Embedded Multiport Memory. [Citation Graph (0, 0)][DBLP] ITC, 1985, pp:106-114 [Conf]
- Jacob Savir, William H. McAnney, Salvatore R. Vecchio
Testing for Coupled Cells in Random-Access Memories. [Citation Graph (0, 0)][DBLP] ITC, 1989, pp:439-451 [Conf]
- Paul H. Bardell, William H. McAnney
Pseudorandom Arrays for Built-In Tests. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 1986, v:35, n:7, pp:653-658 [Journal]
- William H. McAnney, Jacob Savir
Built-In Checking of the Correct Self-Test Signature. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 1988, v:37, n:9, pp:1142-1145 [Journal]
- Jacob Savir, William H. McAnney
Random Pattern Testability of Delay Faults. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 1988, v:37, n:3, pp:291-300 [Journal]
- Jacob Savir, William H. McAnney
A Multiple Seed Linear Feedback Shift Register. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 1992, v:41, n:2, pp:250-252 [Journal]
- Jacob Savir, William H. McAnney, Salvatore R. Vecchio
Fault Propagation Through Embedded Multiport Memories. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 1987, v:36, n:5, pp:592-602 [Journal]
- Jacob Savir, William H. McAnney, Salvatore R. Vecchio
Testing for Coupled Cells in Random-Access Memories. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 1991, v:40, n:10, pp:1177-1180 [Journal]
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