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Narayanan Krishnamurthy: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Jayanta Bhadra, Narayanan Krishnamurthy
    Automatic Generation of Design Constraints in Verifying High Performance Embedded Dynamic Circuits. [Citation Graph (0, 0)][DBLP]
    ITC, 2002, pp:213-222 [Conf]
  2. Jayanta Bhadra, Narayanan Krishnamurthy, Magdy S. Abadir
    A Methodology for Validating Manufacturing Test Vector Suites for Custom Designed Scan-Based Circuits. [Citation Graph (0, 0)][DBLP]
    MTV, 2003, pp:32-37 [Conf]
  3. Narayanan Krishnamurthy, Jayanta Bhadra, Magdy S. Abadir, Jacob A. Abraham
    Towards The Complete Elimination of Gate/Switch Level Simulations. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2004, pp:115-0 [Conf]
  4. Narayanan Krishnamurthy, Jayanta Bhadra, Magdy S. Abadir, Jacob A. Abraham
    Is State Mapping Essential for Equivalence Checking Custom Memories in Scan-Based Designs? [Citation Graph (0, 0)][DBLP]
    VTS, 2002, pp:275-280 [Conf]
  5. Narayanan Krishnamurthy, Andrew K. Martin, Magdy S. Abadir, Jacob A. Abraham
    Validation of PowerPC(tm) Custom Memories using Symbolic Simulation. [Citation Graph (0, 0)][DBLP]
    VTS, 2000, pp:9-14 [Conf]
  6. Jayanta Bhadra, Narayanan Krishnamurthy, Magdy S. Abadir
    Enhanced Equivalence Checking: Toward a Solidarity of Functional Verification and Manufacturing Test Generation. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2004, v:21, n:6, pp:494-502 [Journal]
  7. Narayanan Krishnamurthy, Magdy S. Abadir, Andrew K. Martin, Jacob A. Abraham
    Design and Development Paradigm for Industrial Formal Verification CAD Tools. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2001, v:18, n:4, pp:26-35 [Journal]
  8. Narayanan Krishnamurthy, Andrew K. Martin, Magdy S. Abadir, Jacob A. Abraham
    Validating PowerPC Microprocessor Custom Memories. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2000, v:17, n:4, pp:61-76 [Journal]
  9. Prabhat Mishra, Nikil Dutt, Narayanan Krishnamurthy, Magdy S. Abadir
    A Top-Down Methodology for Microprocessor Validation. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2004, v:21, n:2, pp:122-131 [Journal]
  10. Magdy S. Abadir, Ken Albin, John Havlicek, Narayanan Krishnamurthy, Andrew K. Martin
    Formal Verification Successes at Motorola. [Citation Graph (0, 0)][DBLP]
    Formal Methods in System Design, 2003, v:22, n:2, pp:117-123 [Journal]
  11. Zeyad Alkhalifa, V. S. S. Nair, Narayanan Krishnamurthy, Jacob A. Abraham
    Design and Evaluation of System-Level Checks for On-Line Control Flow Error Detection. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 1999, v:10, n:6, pp:627-641 [Journal]

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