|
Search the dblp DataBase
Eric Bruls:
[Publications]
[Author Rank by year]
[Co-authors]
[Prefers]
[Cites]
[Cited by]
Publications of Author
- Eric Bruls
Variable Supply Voltage Testing for Analogue CMOS and Bipolar Circuits. [Citation Graph (0, 0)][DBLP] ITC, 1994, pp:562-571 [Conf]
- Eric Bruls, F. Camerik, H. J. Kretschman, Jochen A. G. Jess
A Generic Method to Develop a Defect Monitoring System for IC Processes. [Citation Graph (0, 0)][DBLP] ITC, 1991, pp:218-227 [Conf]
- R. J. A. Harvey, Andrew M. D. Richardson, Eric Bruls, Keith Baker
Analogue Fault Simulation Based on Layout-Dependent Fault Models. [Citation Graph (0, 0)][DBLP] ITC, 1994, pp:641-649 [Conf]
- Rosa Rodríguez-Montañés, Joan Figueras, Eric Bruls
Bridging Defects Resistance Measurements in a CMOS Process. [Citation Graph (0, 0)][DBLP] ITC, 1992, pp:892-899 [Conf]
- Marly Roncken, Eric Bruls
Test Quality of Asynchronous Circuits: A Defect-oriented Evaluation. [Citation Graph (0, 0)][DBLP] ITC, 1996, pp:205-214 [Conf]
- M. M. A. van Rosmalen, Keith Baker, Eric Bruls, Jochen A. G. Jess
Parameter Monitoring: Advantages and Pitfalls. [Citation Graph (0, 0)][DBLP] ITC, 1993, pp:115-124 [Conf]
Search in 0.002secs, Finished in 0.002secs
|