The SCEAS System
Navigation Menu

Search the dblp DataBase


Jean Paul Caisso: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Jean Paul Caisso, Bernard Courtois
    Fault Simulation and Test Pattern Generation at the Multiple-Valued Switch Level. [Citation Graph (0, 0)][DBLP]
    ITC, 1988, pp:94-101 [Conf]
  2. Jean Paul Caisso, Eduard Cerny, Nicholas C. Rumin
    A recursive technique for computing delays in series-parallel MOS transistor circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1991, v:10, n:5, pp:589-595 [Journal]

Search in 0.001secs, Finished in 0.001secs
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
System created by [] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002