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Eric N. Tran: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Sreejit Chakravarty, Eric W. Savage, Eric N. Tran
    Defect Coverage Analysis of Partitioned Testing. [Citation Graph (0, 0)][DBLP]
    ITC, 2004, pp:907-915 [Conf]
  2. Sreejit Chakravarty, Yi-Shing Chang, Hiep Hoang, Sridhar Jayaraman, Silvio Picano, Cheryl Prunty, Eric W. Savage, Rehan Sheikh, Eric N. Tran, Khen Wee
    Experimental Evaluation of Bridge Patterns for a High Performance Microprocessor. [Citation Graph (0, 0)][DBLP]
    VTS, 2005, pp:337-342 [Conf]
  3. Eric N. Tran, Vishwashanth Kasulasrinivas, Sreejit Chakravarty
    Silicon Evaluation of Logic Proximity Bridge Patterns. [Citation Graph (0, 0)][DBLP]
    VTS, 2006, pp:78-85 [Conf]

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