The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Abu S. M. Hassan: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Abu S. M. Hassan, Vinod K. Agarwal, Janusz Rajski
    Testing and Diagnosis of Interconnects Using Boundary Scan Architecture. [Citation Graph (0, 0)][DBLP]
    ITC, 1988, pp:126-137 [Conf]
  2. Abu S. M. Hassan, Vinod K. Agarwal, Janusz Rajski, Benoit Nadeau-Dostie
    Testing of Glue Logic Interconnects Using Boundary Scan Architecture. [Citation Graph (0, 0)][DBLP]
    ITC, 1989, pp:700-711 [Conf]
  3. Graham Hetherington, Tony Fryars, Nagesh Tamarapalli, Mark Kassab, Abu S. M. Hassan, Janusz Rajski
    Logic BIST for large industrial designs: real issues and case studies. [Citation Graph (0, 0)][DBLP]
    ITC, 1999, pp:358-367 [Conf]
  4. Benoit Nadeau-Dostie, Dwayne Burek, Abu S. M. Hassan
    ScanBIST: A Multi-frequency Scan-based BIST Method. [Citation Graph (0, 0)][DBLP]
    ITC, 1992, pp:506-513 [Conf]
  5. Benoit Nadeau-Dostie, Dwayne Burek, Abu S. M. Hassan
    ScanBist: A Multifrequency Scan-Based BIST Method. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1994, v:11, n:1, pp:7-17 [Journal]
  6. Abu S. M. Hassan, Vinod K. Agarwal, Benoit Nadeau-Dostie, Janusz Rajski
    BIST of PCB interconnects using boundary-scan architecture. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1992, v:11, n:10, pp:1278-1288 [Journal]

Search in 0.001secs, Finished in 0.001secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002