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Y. Hayasaka: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Y. Hayasaka, K. Shimotori, K. Okada
    Testing System for Redundant Memory. [Citation Graph (0, 0)][DBLP]
    ITC, 1982, pp:240-244 [Conf]
  2. Y. Nishimura, M. Hamada, Y. Hayasaka
    A New Timing Calibration Method for High Speed Memory Test. [Citation Graph (0, 0)][DBLP]
    ITC, 1984, pp:113-117 [Conf]
  3. Y. Nishimura, M. Hamada, H. Hidaka, H. Ozaki, K. Fujishima, Y. Hayasaka
    Redundancy Test for 1 Mbit DRAM Using Multi-Bit-Test Mode. [Citation Graph (0, 0)][DBLP]
    ITC, 1986, pp:826-829 [Conf]
  4. T. Noguchi, Atsushi Murakami, Masato Kawai, Y. Hayasaka
    Testing for a Solid-State Color Image Sensor. [Citation Graph (0, 0)][DBLP]
    ITC, 1986, pp:683-687 [Conf]

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