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Hyungwon Kim :
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Hyungwon Kim , John P. Hayes High-coverage ATPG for datapath circuits with unimplemented blocks. [Citation Graph (0, 0)][DBLP ] ITC, 1998, pp:577-586 [Conf ] Hyungwon Kim , John P. Hayes Delay fault testing of IP-based designs via symbolic path modeling. [Citation Graph (0, 0)][DBLP ] ITC, 1999, pp:1045-1054 [Conf ] Hyungwon Kim , John P. Hayes Delay Fault Testing of Designs with Embedded IP Cores. [Citation Graph (0, 0)][DBLP ] VTS, 1999, pp:160-167 [Conf ] Hyungwon Kim , John P. Hayes Realization-independent ATPG for designs with unimplemented blocks. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 2001, v:20, n:2, pp:290-306 [Journal ] Hyungwon Kim , John P. Hayes Delay fault testing of IP-based designs via symbolic path modeling. [Citation Graph (0, 0)][DBLP ] IEEE Trans. VLSI Syst., 2001, v:9, n:5, pp:661-678 [Journal ] Search in 0.001secs, Finished in 0.001secs