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Masashi Shimanouchi: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Masashi Shimanouchi
    An approach to consistent jitter modeling for various jitter aspects and measurement methods. [Citation Graph (0, 0)][DBLP]
    ITC, 2001, pp:848-857 [Conf]
  2. Masashi Shimanouchi
    New Paradigm for Signal Paths in ATE Pin Electronics are Needed for Serialcom Device Testing. [Citation Graph (0, 0)][DBLP]
    ITC, 2002, pp:903-912 [Conf]
  3. Masashi Shimanouchi
    Periodic Jitter Injection with Direct Time Synthesis by SPPTM ATE for SerDes Jitter Tolerance Test in Production. [Citation Graph (0, 0)][DBLP]
    ITC, 2003, pp:48-57 [Conf]
  4. Masashi Shimanouchi
    Timing Accuracy Enhancement by a New Calibration Scheme for Multi-Gbps ATE. [Citation Graph (0, 0)][DBLP]
    ITC, 2004, pp:567-576 [Conf]
  5. A. T. Sivaram, Masashi Shimanouchi, Howard Maassen, Robert Jackson
    Tester Architecture For The Source Synchronous Bus. [Citation Graph (0, 0)][DBLP]
    ITC, 2004, pp:738-747 [Conf]

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