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Publications of Author

1. Pradip A. Thaker, Vishwani D. Agrawal, Mona E. Zaghloul
   Register-transfer level fault modeling and test evaluation techniques for VLSI circuits. [Citation Graph (0, 0)][DBLP]
   ITC, 2000, pp:940-949 [Conf]
   
2. Pradip A. Thaker, Mona E. Zaghloul, Minesh B. Amin
   Study of Correlation of Testability Aspects of RTL Description and Resulting Structural Implementations. [Citation Graph (0, 0)][DBLP]
   VLSI Design, 1999, pp:256-259 [Conf]
   
3. Pradip A. Thaker, Vishwani D. Agrawal, Mona E. Zaghloul
   Validation Vector Grade (VVG): A New Coverage Metric for Validation and Test. [Citation Graph (0, 0)][DBLP]
   VTS, 1999, pp:182-188 [Conf]
   
4. Pradip A. Thaker, Vishwani D. Agrawal, Mona E. Zaghloul
   A test evaluation technique for VLSI circuits using register-transfer level fault modeling. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 2003, v:22, n:8, pp:1104-1113 [Journal]
   
5. 
   Holistic verification: myth or magic bullet? [Citation Graph (, )][DBLP]