The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Chung-Chih Hsiao: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Kwang-Jow Gan, Dong-Shong Liang, Chung-Chih Hsiao, Shih-Yu Wang, Feng-Chang Chiang, Cher-Shiung Tsai, Yaw-Hwang Chen, Shun-Huo Kuo, Chi-Pin Chen
    Logic Circuit Design Based on MOS-NDR Devices and Circuits Fabricated by CMOS Process. [Citation Graph (0, 0)][DBLP]
    IWSOC, 2005, pp:392-395 [Conf]
  2. Dong-Shong Liang, Kwang-Jow Gan, Long-Xian Su, Chi-Pin Chen, Chung-Chih Hsiao, Cher-Shiung Tsai, Yaw-Hwang Chen, Shih-Yu Wang, Shun-Huo Kuo, Feng-Chang Chiang
    Four-Valued Memory Circuit Designed by Multiple-Peak MOS-NDR Devices and Circuits. [Citation Graph (0, 0)][DBLP]
    IWSOC, 2005, pp:78-81 [Conf]
  3. Dong-Shong Liang, Kwang-Jow Gan, Chung-Chih Hsiao, Cher-Shiung Tsai, Yaw-Hwang Chen, Shih-Yu Wang, Shun-Huo Kuo, Feng-Chang Chiang, Long-Xian Su
    Novel Voltage-Controlled Oscillator Design by MOS-NDR Devices and Circuits. [Citation Graph (0, 0)][DBLP]
    IWSOC, 2005, pp:372-375 [Conf]

Search in 0.001secs, Finished in 0.002secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002