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Jordi Tubella: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Jordi Tubella, Antonio González
    Combining depth-first and breadth-first search in Prolog execution. [Citation Graph (0, 0)][DBLP]
    GULP-PRODE (2), 1994, pp:452-453 [Conf]
  2. Carles Aliagas, Carlos Molina, Montse Garcia, Antonio González, Jordi Tubella
    Value Compression to Reduce Power in Data Caches. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 2003, pp:616-622 [Conf]
  3. Jordi Tubella, Antonio González
    Control Speculation in Multithreaded Processors through Dynamic Loop Detection. [Citation Graph (0, 0)][DBLP]
    HPCA, 1998, pp:14-23 [Conf]
  4. Carlos Molina, Antonio González, Jordi Tubella
    Reducing Memory Traffic Via Redundant Store Instructions. [Citation Graph (0, 0)][DBLP]
    HPCN Europe, 1999, pp:1246-1249 [Conf]
  5. Carlos Molina, Antonio González, Jordi Tubella
    Trace-Level Speculative Multithreaded Architecture. [Citation Graph (0, 0)][DBLP]
    ICCD, 2002, pp:402-407 [Conf]
  6. Antonio González, Jordi Tubella, Carlos Molina
    Trace-Level Reuse. [Citation Graph (0, 0)][DBLP]
    ICPP, 1999, pp:30-0 [Conf]
  7. Carlos Molina, Antonio González, Jordi Tubella
    Dynamic removal of redundant computations. [Citation Graph (0, 0)][DBLP]
    International Conference on Supercomputing, 1999, pp:474-481 [Conf]
  8. Pedro Marcuello, Antonio González, Jordi Tubella
    Speculative Multithreaded Processors. [Citation Graph (0, 0)][DBLP]
    International Conference on Supercomputing, 1998, pp:77-84 [Conf]
  9. Jordi Tubella, Antonio González
    A Partial Breadth-First Execution Model for Prolog. [Citation Graph (0, 0)][DBLP]
    ICTAI, 1994, pp:129-137 [Conf]
  10. Carlos Molina, Carles Aliagas, Montse Garcia, Antonio González, Jordi Tubella
    Non redundant data cache. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2003, pp:274-277 [Conf]
  11. Pedro Marcuello, Jordi Tubella, Antonio González
    Value Prediction for Speculative Multithreaded Architectures. [Citation Graph (0, 0)][DBLP]
    MICRO, 1999, pp:230-0 [Conf]
  12. Jordi Tubella, Antonio González
    Exploiting path parallelism in logic programming. [Citation Graph (0, 0)][DBLP]
    PDP, 1995, pp:164-173 [Conf]
  13. Jordi Tubella, Antonio González, E. Elias
    The Multipath Architecture for Prolog Programs. [Citation Graph (0, 0)][DBLP]
    Comput. J., 1996, v:39, n:9, pp:780-792 [Journal]
  14. Pedro Marcuello, Antonio González, Jordi Tubella
    Thread Partitioning and Value Prediction for Exploiting Speculative Thread-Level Parallelism. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2004, v:53, n:2, pp:114-125 [Journal]

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