The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Maurício L. Pilla: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Márcia C. Cera, Guilherme P. Pezzi, Maurício L. Pilla, Nicolas Maillard, Philippe Olivier Alexandre Navaux
    Scheduling Dynamically Spawned Processes in MPI-2. [Citation Graph (0, 0)][DBLP]
    JSSPP, 2006, pp:33-46 [Conf]
  2. Maurício L. Pilla, Philippe Olivier Alexandre Navaux, Bruce R. Childers, Amarildo T. da Costa, Felipe Maia Galvão França
    Value Predictors for Reuse through Speculation on Traces. [Citation Graph (0, 0)][DBLP]
    SBAC-PAD, 2004, pp:48-55 [Conf]
  3. Maurício L. Pilla, Amarildo T. da Costa, Felipe M. G. França, Bruce R. Childers, Mary Lou Soffa
    The Limits of Speculative Trace Reuse on Deeply Pipelined Processors. [Citation Graph (0, 0)][DBLP]
    SBAC-PAD, 2003, pp:36-45 [Conf]
  4. Rafael R. dos Santos, Tatiana G. S. dos Santos, Maurício L. Pilla, Philippe Olivier Alexandre Navaux, Sergio Bampi, Mario Nemirovsky
    Complex Branch Profiling for Dynamic Conditional Execution. [Citation Graph (0, 0)][DBLP]
    SBAC-PAD, 2003, pp:28-35 [Conf]

  5. Evaluating the Effects of Branch Prediction Accuracy on the Performance of SMT Architectures. [Citation Graph (, )][DBLP]


  6. A Speculative Trace Reuse Architecture with Reduced Hardware Requirements. [Citation Graph (, )][DBLP]


Search in 0.001secs, Finished in 0.001secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002