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James Poe: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Xin Fu, James Poe, Tao Li, José A. B. Fortes
    Characterizing Microarchitecture Soft Error Vulnerability Phase Behavior. [Citation Graph (0, 0)][DBLP]
    MASCOTS, 2006, pp:147-155 [Conf]

  2. TransMetric: architecture independent workload characterization for transactional memory benchmarks. [Citation Graph (, )][DBLP]


  3. Accurate, scalable and informative design space exploration for large and sophisticated multi-core oriented architectures. [Citation Graph (, )][DBLP]


  4. TransPlant: A parameterized methodology for generating transactional memory workloads. [Citation Graph (, )][DBLP]


  5. Using Analytical Models to Efficiently Explore Hardware Transactional Memory and Multi-Core Co-Design. [Citation Graph (, )][DBLP]


  6. On the (dis)similarity of transactional memory workloads. [Citation Graph (, )][DBLP]


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