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James M. Baker Jr.: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Priyadarshini Ramachandran, Charles W. Lewis Jr., James M. Baker Jr.
    A Power and Performance Simulator for a Single-Chip Message-Passing Parallel Architecture. [Citation Graph (0, 0)][DBLP]
    MSV/AMCS, 2004, pp:31-37 [Conf]
  2. James M. Baker Jr., Sidney Bennett, Mark Bucciero, Brian T. Gold, Rajneesh Mahajan
    SCMP: A Single-chip Message-passing Parallel Computer. [Citation Graph (0, 0)][DBLP]
    PDPTA, 2002, pp:1485-1491 [Conf]
  3. James M. Baker Jr., Brian T. Gold, Mark Bucciero, Sidney Bennett, Rajneesh Mahajan, Priyadarshini Ramachandran, Jignesh Shah
    SCMP: A Single-Chip Message-Passing Parallel Computer. [Citation Graph (0, 0)][DBLP]
    The Journal of Supercomputing, 2004, v:30, n:2, pp:133-149 [Journal]
  4. D. Scott Wills, Huy Cat, José Cruz-Rivera, W. Stephen Lacy, James M. Baker Jr., John Eble, Abelardo López-Lagunas, Michael A. Hopper
    High-Throughput, Low-Memory Applications on the Pica Architecture. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 1997, v:8, n:10, pp:1055-1067 [Journal]

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