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Publications of Author

1. David Berner, Hiren D. Patel, Deepak Mathaikutty, Sandeep K. Shukla
   Automated Extraction of Structural Information from SystemC-based IP for Validation. [Citation Graph (0, 0)][DBLP]
   MTV, 2005, pp:99-104 [Conf]
   
2. Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla, David Berner
   Extreme Formal Modeling (XFM) for Hardware Models. [Citation Graph (0, 0)][DBLP]
   MTV, 2004, pp:30-35 [Conf]
   
3. Sreekumar V. Kodakara, Deepak Mathaikutty, Ajit Dingankar, Sandeep K. Shukla, David J. Lilja
   Model Based Test Generation for Microprocessor Architecture Validation. [Citation Graph (0, 0)][DBLP]
   VLSI Design, 2007, pp:465-472 [Conf]
   
4. Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla, David Berner, Jean-Pierre Talpin
   A Functional Programming Framework for Latency Insensitive Protocol Validation. [Citation Graph (0, 0)][DBLP]
   Electr. Notes Theor. Comput. Sci., 2006, v:146, n:2, pp:169-188 [Journal]
   
5. Syed Suhaib, Deepak Mathaikutty, David Berner, Sandeep K. Shukla
   Validating Families of Latency Insensitive Protocols. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 2006, v:55, n:11, pp:1391-1401 [Journal]
   
6. Hiren D. Patel, Deepak Mathaikutty, David Berner, Sandeep K. Shukla
   CARH: service-oriented architecture for validating system-level designs. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 2006, v:25, n:8, pp:1458-1474 [Journal]
   
7. Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla, David Berner
   XFM: An incremental methodology for developing formal models. [Citation Graph (0, 0)][DBLP]
   ACM Trans. Design Autom. Electr. Syst., 2005, v:10, n:4, pp:589-609 [Journal]
   
8. Deepak Mathaikutty, Sandeep K. Shukla, Sreekumar V. Kodakara, David J. Lilja, Ajit Dingankar
   Design fault directed test generation for microprocessor validation. [Citation Graph (0, 0)][DBLP]
   DATE, 2007, pp:761-766 [Conf]
   
9. Deepak Mathaikutty, Sandeep K. Shukla
   Type Inference for IP Composition. [Citation Graph (0, 0)][DBLP]
   MEMOCODE, 2007, pp:61-70 [Conf]
   
10. Deepak Mathaikutty, Hiren D. Patel, Sandeep K. Shukla, Axel Jantsch
    EWD: A metamodeling driven customizable multi-MoC system modeling framework. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2007, v:12, n:3, pp:- [Journal]
    
11. 
    Power estimation methodology for a high-level synthesis framework. [Citation Graph (, )][DBLP]
    
    
12. 
    Assertion-Based Modal Power Estimation. [Citation Graph (, )][DBLP]
    
    
13. 
    Formal Transformation of a KPN Specification to a GALS Implementation. [Citation Graph (, )][DBLP]
    
    
14. 
    A Metamodeling based Framework for Architectural Modeling and Simulator Generation. [Citation Graph (, )][DBLP]
    
    
15. 
    MCF: A Metamodeling-based Visual Component Composition Framework. [Citation Graph (, )][DBLP]
    
    
16. 
    Mining Metadata for Composability of IPs from SystemC IP Library. [Citation Graph (, )][DBLP]
    
    
17. 
    Modelling Environment for Heterogeneous Systems based on MoCs. [Citation Graph (, )][DBLP]
    
    
18. 
    SystemCXML: An Exstensible SystemC Front end Using XML. [Citation Graph (, )][DBLP]
    
    
19. 
    A Functional Programming Framework of Heterogeneous Model of Computation for System Design. [Citation Graph (, )][DBLP]
    
    
20. 
    Metamodeling: An Emerging Representation Paradigm for System-Level Design. [Citation Graph (, )][DBLP]
    
    
21. 
    Dataflow Architectures for GALS. [Citation Graph (, )][DBLP]