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Georg Georgakos:
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- Stephan Henzler, Georg Georgakos, Jörg Berthold, Doris Schmitt-Landsiedel
Single Supply Voltage High-Speed Semi-dynamic Level-Converting Flip-Flop with Low Power and Area Consumption. [Citation Graph (0, 0)][DBLP] PATMOS, 2004, pp:392-401 [Conf]
- Stephan Henzler, Georg Georgakos, Jörg Berthold, Doris Schmitt-Landsiedel
Two Level Compact Simulation Methodology for Timing Analysis of Power-Switched Circuits. [Citation Graph (0, 0)][DBLP] PATMOS, 2004, pp:789-798 [Conf]
- Stephan Henzler, Markus Koban, Doris Schmitt-Landsiedel, Jörg Berthold, Georg Georgakos
Design Aspects and Technological Scaling Limits of ZigZag Circuit Block Switch-Off Schemes. [Citation Graph (0, 0)][DBLP] VLSI-SOC, 2003, pp:246-251 [Conf]
- Franz X. Ruckerbauer, Georg Georgakos
Soft Error Rates in 65nm SRAMs--Analysis of new Phenomena. [Citation Graph (0, 0)][DBLP] IOLTS, 2007, pp:203-204 [Conf]
Aging analysis of circuit timing considering NBTI and HCI. [Citation Graph (, )][DBLP]
A Design Space Comparison of 6T and 8T SRAM Core-Cells. [Citation Graph (, )][DBLP]
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