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B. Chung: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. B. Chung, J. B. Kuo
    Gate-Level Dual-Threshold Static Power Optimization Methodology (GDSPOM) Using Path-Based Static Timing Analysis (STA) Technique. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2006, pp:237-246 [Conf]
  2. B. Chung, J. B. Kuo
    Gate-level dual-threshold static power optimization methodology (GDSPOM) for designing high-speed low-power SOC applications using 90nm MTCMOS technology. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]

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