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Andrea Pugliese 0002:
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- Gregorio Cappuccino, Andrea Pugliese 0002, Giuseppe Cocorullo
Output Resistance Scaling Model for Deep-Submicron Cmos Buffers for Timing Performance Optimisation. [Citation Graph (0, 0)][DBLP] PATMOS, 2005, pp:329-336 [Conf]
- Andrea Pugliese 0002, Gregorio Cappuccino, Giuseppe Cocorullo
A Simple MOSFET Parasitic Capacitance Model and Its Application to Repeater Insertion Technique. [Citation Graph (0, 0)][DBLP] PATMOS, 2006, pp:311-318 [Conf]
- Andrea Pugliese 0002, Gregorio Cappuccino, Giuseppe Cocorullo
Correct Modelling of Nested Miller Compensated Amplifier for Discrete-Time Applications. [Citation Graph (0, 0)][DBLP] PATMOS, 2006, pp:524-531 [Conf]
- Andrea Pugliese 0002, Gregorio Cappuccino, Giuseppe Cocorullo
Settling Time Minimization of Operational Amplifiers. [Citation Graph (0, 0)][DBLP] PATMOS, 2007, pp:107-116 [Conf]
Settling-Optimization-Based Design Approach for Three-Stage Nested-Miller Amplifiers. [Citation Graph (, )][DBLP]
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