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Oded Maler :
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Oded Maler , Amir Pnueli Learning omega-Regular Languages from Queries and Counter-Examples (A Preliminary Report). [Citation Graph (0, 0)][DBLP ] AII, 1989, pp:161-170 [Conf ] Oded Maler Timed Automata as an Underlying Model for Planning and Scheduling. [Citation Graph (0, 0)][DBLP ] AIPS Workshop on Planning for Temporal Domains, 2002, pp:67-70 [Conf ] Yasmina Abdeddaïm , Oded Maler Job-Shop Scheduling Using Timed Automata. [Citation Graph (0, 0)][DBLP ] CAV, 2001, pp:478-492 [Conf ] Eugene Asarin , Thao Dang , Oded Maler The d/dt Tool for Verification of Hybrid Systems. [Citation Graph (0, 0)][DBLP ] CAV, 2002, pp:365-370 [Conf ] Marius Bozga , Conrado Daws , Oded Maler , Alfredo Olivero , Stavros Tripakis , Sergio Yovine Kronos: A Model-Checking Tool for Real-Time Systems. [Citation Graph (0, 0)][DBLP ] CAV, 1998, pp:546-550 [Conf ] Marius Bozga , Oded Maler On the Representation of Probabilities over Structured Domains. [Citation Graph (0, 0)][DBLP ] CAV, 1999, pp:261-273 [Conf ] Marius Bozga , Oded Maler , Amir Pnueli , Sergio Yovine Some Progress in the Symbolic Verification of Timed Automata. [Citation Graph (0, 0)][DBLP ] CAV, 1997, pp:179-190 [Conf ] Yonit Kesten , Oded Maler , Monica Marcus , Amir Pnueli , Elad Shahar Symbolic Model Checking with Rich ssertional Languages. [Citation Graph (0, 0)][DBLP ] CAV, 1997, pp:424-435 [Conf ] Oded Maler , Amir Pnueli Reachability Analysis of Planar Multi-limear Systems. [Citation Graph (0, 0)][DBLP ] CAV, 1993, pp:194-209 [Conf ] Marius Bozga , Oded Maler , Stavros Tripakis Efficient Verification of Timed Automata Using Dense and Discrete Time Semantics. [Citation Graph (0, 0)][DBLP ] CHARME, 1999, pp:125-141 [Conf ] Oded Maler , Amir Pnueli Timing analysis of asynchronous circuits using timed automata. [Citation Graph (0, 0)][DBLP ] CHARME, 1995, pp:189-205 [Conf ] Oded Maler , Amir Pnueli On the Learnability of Infinitary Regular Sets. [Citation Graph (0, 0)][DBLP ] COLT, 1991, pp:128-136 [Conf ] Ahmed Bouajjani , Javier Esparza , Oded Maler Reachability Analysis of Pushdown Automata: Application to Model-Checking. [Citation Graph (0, 0)][DBLP ] CONCUR, 1997, pp:135-150 [Conf ] Eugene Asarin , Oded Maler , Amir Pnueli On Discretization of Delays in Timed Automata and Digital Circuits. [Citation Graph (0, 0)][DBLP ] CONCUR, 1998, pp:470-484 [Conf ] Ramzi Ben Salah , Marius Bozga , Oded Maler On Interleaving in Timed Automata. [Citation Graph (0, 0)][DBLP ] CONCUR, 2006, pp:465-476 [Conf ] Thao Dang , Alexandre Donzé , Oded Maler Verification of Analog and Mixed-Signal Circuits Using Hybrid System Techniques. [Citation Graph (0, 0)][DBLP ] FMCAD, 2004, pp:21-36 [Conf ] Oded Maler , Amir Pnueli Tight Bounds on the Complexity of Cascaded Decomposition of Automata [Citation Graph (0, 0)][DBLP ] FOCS, 1990, pp:672-682 [Conf ] Ramzi Ben Salah , Marius Bozga , Oded Maler On Timing Analysis of Combinational Circuits. [Citation Graph (0, 0)][DBLP ] FORMATS, 2003, pp:204-219 [Conf ] Scott Cotton , Eugene Asarin , Oded Maler , Peter Niebert Some Progress in Satisfiability Checking for Difference Logic. [Citation Graph (0, 0)][DBLP ] FORMATS/FTRTFT, 2004, pp:263-276 [Conf ] Oded Maler , Dejan Nickovic Monitoring Temporal Properties of Continuous Signals. [Citation Graph (0, 0)][DBLP ] FORMATS/FTRTFT, 2004, pp:152-166 [Conf ] Oded Maler , Dejan Nickovic , Amir Pnueli Real Time Temporal Logic: Past, Present, Future. [Citation Graph (0, 0)][DBLP ] FORMATS, 2005, pp:2-16 [Conf ] Oded Maler , Dejan Nickovic , Amir Pnueli From MITL to Timed Automata. [Citation Graph (0, 0)][DBLP ] FORMATS, 2006, pp:274-289 [Conf ] Oded Maler , Amir Pnueli On Recognizable Timed Languages. [Citation Graph (0, 0)][DBLP ] FoSSaCS, 2004, pp:348-362 [Conf ] Eugene Asarin , Oded Maler Achilles and the Tortoise Climbing Up the Arithmetical Hierarchy. [Citation Graph (0, 0)][DBLP ] FSTTCS, 1995, pp:471-483 [Conf ] Marius Bozga , Conrado Daws , Oded Maler , Alfredo Olivero , Stavros Tripakis , Sergio Yovine KRONOS: A Model-Checking Tool for Real-Time Systems (Tool-Presentation for FTRTFT '98). [Citation Graph (0, 0)][DBLP ] FTRTFT, 1998, pp:298-302 [Conf ] Bernard Delyon , Oded Maler On Fault-Tolerant Symbolic Computations. [Citation Graph (0, 0)][DBLP ] FTRTFT, 1992, pp:259-269 [Conf ] Oded Maler , Bruce H. Krogh , Moez Mahfoudh On Control with Bounded Computational Resources. [Citation Graph (0, 0)][DBLP ] FTRTFT, 2002, pp:147-164 [Conf ] Peter Niebert , Moez Mahfoudh , Eugene Asarin , Marius Bozga , Oded Maler , Navendu Jain Verification of Timed Automata via Satisfiability Checking. [Citation Graph (0, 0)][DBLP ] FTRTFT, 2002, pp:225-244 [Conf ] Eugene Asarin , Sorav Bansal , Bernard Espiau , Thao Dang , Oded Maler On Hybrid Control of Under-Actuated Mechanical Systems. [Citation Graph (0, 0)][DBLP ] HSCC, 2001, pp:77-88 [Conf ] Eugene Asarin , Marius Bozga , Alain Kerbrat , Oded Maler , Amir Pnueli , Anne Rasse Data-Structures for the Verification of Timed Automata. [Citation Graph (0, 0)][DBLP ] HART, 1997, pp:346-360 [Conf ] Eugene Asarin , Thao Dang , Oded Maler , Olivier Bournez Approximate Reachability Analysis of Piecewise-Linear Dynamical Systems. [Citation Graph (0, 0)][DBLP ] HSCC, 2000, pp:20-31 [Conf ] Eugene Asarin , Oded Maler As Soon as Possible: Time Optimal Control for Timed Automata. [Citation Graph (0, 0)][DBLP ] HSCC, 1999, pp:19-30 [Conf ] Olivier Bournez , Oded Maler , Amir Pnueli Orthogonal Polyhedra: Representation and Computation. [Citation Graph (0, 0)][DBLP ] HSCC, 1999, pp:46-60 [Conf ] Eugene Asarin , Oded Maler , Amir Pnueli Symbolic Controller Synthesis for Discrete and Timed Systems. [Citation Graph (0, 0)][DBLP ] Hybrid Systems, 1994, pp:1-20 [Conf ] Thao Dang , Oded Maler Reachability Analysis via Face Lifting. [Citation Graph (0, 0)][DBLP ] HSCC, 1998, pp:96-109 [Conf ] Jim Kapinski , Bruce H. Krogh , Oded Maler , Olaf Stursberg On Systematic Simulation of Open Continuous Systems. [Citation Graph (0, 0)][DBLP ] HSCC, 2003, pp:283-297 [Conf ] Antoine Girard , Colas Le Guernic , Oded Maler Efficient Computation of Reachable Sets of Linear Time-Invariant Systems with Inputs. [Citation Graph (0, 0)][DBLP ] HSCC, 2006, pp:257-271 [Conf ] Alberto L. Sangiovanni-Vincentelli , Thomas A. Henzinger , Bruce H. Krogh , Oded Maler , Manfred Morari , Costas C. Pantelides , George J. Pappas , Tunc Simsec , Janos Sztipanovits , Stavros Tripakis Hybrid Systems Applications: An Oxymoron? [Citation Graph (0, 0)][DBLP ] HSCC, 2001, pp:5-6 [Conf ] Goran Frehse , Oded Maler Reachability Analysis of a Switched Buffer Network. [Citation Graph (0, 0)][DBLP ] HSCC, 2007, pp:698-701 [Conf ] Alexandre Donzé , Oded Maler Systematic Simulation Using Sensitivity Analysis. [Citation Graph (0, 0)][DBLP ] HSCC, 2007, pp:174-189 [Conf ] Eugene Asarin , Oded Maler On some Relations between Dynamical Systems and Transition Systems. [Citation Graph (0, 0)][DBLP ] ICALP, 1994, pp:59-72 [Conf ] Olivier Bournez , Oded Maler On the Representation of Timed Polyhedra. [Citation Graph (0, 0)][DBLP ] ICALP, 2000, pp:793-807 [Conf ] Oded Maler , Zahava Scherz , Ehud Y. Shapiro A New Approach for Intruducing Prolog to Naive Users. [Citation Graph (0, 0)][DBLP ] ICLP, 1986, pp:544-551 [Conf ] Yasmina Abdeddaïm , Abdelkarim Kerbaa , Oded Maler Task Graph Scheduling Using Timed Automata. [Citation Graph (0, 0)][DBLP ] IPDPS, 2003, pp:237- [Conf ] Eugene Asarin , Paul Caspi , Oded Maler A Kleene Theorem for Timed Automata. [Citation Graph (0, 0)][DBLP ] LICS, 1997, pp:160-171 [Conf ] Oded Maler , Zohar Manna , Amir Pnueli From Timed to Hybrid Systems. [Citation Graph (0, 0)][DBLP ] REX Workshop, 1991, pp:447-484 [Conf ] Marius Bozga , Abdelkarim Kerbaa , Oded Maler Scheduling Acyclic Branching Programs on Parallel Machines. [Citation Graph (0, 0)][DBLP ] RTSS, 2004, pp:208-217 [Conf ] Scott Cotton , Oded Maler Fast and Flexible Difference Constraint Propagation for DPLL(T). [Citation Graph (0, 0)][DBLP ] SAT, 2006, pp:170-183 [Conf ] Oded Maler A Decomposition Theorem for Probabilistic Transition Systems. [Citation Graph (0, 0)][DBLP ] STACS, 1993, pp:323-332 [Conf ] Oded Maler , Amir Pnueli , Joseph Sifakis On the Synthesis of Discrete Controllers for Timed Systems (An Extended Abstract). [Citation Graph (0, 0)][DBLP ] STACS, 1995, pp:229-242 [Conf ] Oded Maler , Ludwig Staiger On Syntactic Congruences for Omega-Languages. [Citation Graph (0, 0)][DBLP ] STACS, 1993, pp:586-594 [Conf ] Yasmina Abdeddaïm , Eugene Asarin , Oded Maler On Optimal Scheduling under Uncertainty. [Citation Graph (0, 0)][DBLP ] TACAS, 2003, pp:240-253 [Conf ] Yasmina Abdeddaïm , Oded Maler Preemptive Job-Shop Scheduling Using Stopwatch Automata. [Citation Graph (0, 0)][DBLP ] TACAS, 2002, pp:113-126 [Conf ] Eugene Asarin , Oded Maler , Sergio Yovine Preface. [Citation Graph (0, 0)][DBLP ] Electr. Notes Theor. Comput. Sci., 2002, v:65, n:6, pp:- [Journal ] Marius Bozga , Hou Jianmin , Oded Maler , Sergio Yovine Verification of Asynchronous Circuits using Timed Automata. [Citation Graph (0, 0)][DBLP ] Electr. Notes Theor. Comput. Sci., 2002, v:65, n:6, pp:- [Journal ] Goran Frehse , Bruce H. Krogh , Rob A. Rutenbar , Oded Maler Time Domain Verification of Oscillator Circuit Properties. [Citation Graph (0, 0)][DBLP ] Electr. Notes Theor. Comput. Sci., 2006, v:153, n:3, pp:9-22 [Journal ] Oded Maler Preface. [Citation Graph (0, 0)][DBLP ] Electr. Notes Theor. Comput. Sci., 2006, v:153, n:3, pp:1-2 [Journal ] Oded Maler Analog Circuit Verification: a State of an Art. [Citation Graph (0, 0)][DBLP ] Electr. Notes Theor. Comput. Sci., 2006, v:153, n:3, pp:3-7 [Journal ] Oded Maler , Amir Pnueli On the Learnability of Infinitary Regular Sets [Citation Graph (0, 0)][DBLP ] Inf. Comput., 1995, v:118, n:2, pp:316-326 [Journal ] Ahmed Bouajjani , Javier Esparza , Alain Finkel , Oded Maler , Peter Rossmanith , Bernard Willems , Pierre Wolper An efficient automata approach to some problems on context-free grammars. [Citation Graph (0, 0)][DBLP ] Inf. Process. Lett., 2000, v:74, n:5-6, pp:221-227 [Journal ] Eugene Asarin , Paul Caspi , Oded Maler Timed regular expressions. [Citation Graph (0, 0)][DBLP ] J. ACM, 2002, v:49, n:2, pp:172-206 [Journal ] Eugene Asarin , Oded Maler Achilles and the Tortoise Climbing Up the Arithmetical Hierarchy. [Citation Graph (0, 0)][DBLP ] J. Comput. Syst. Sci., 1998, v:57, n:3, pp:389-398 [Journal ] Yasmina Abdeddaïm , Eugene Asarin , Oded Maler Scheduling with timed automata. [Citation Graph (0, 0)][DBLP ] Theor. Comput. Sci., 2006, v:354, n:2, pp:272-300 [Journal ] Eugene Asarin , Oded Maler , Amir Pnueli Reachability Analysis of Dynamical Systems Having Piecewise-Constant Derivatives. [Citation Graph (0, 0)][DBLP ] Theor. Comput. Sci., 1995, v:138, n:1, pp:35-65 [Journal ] Bernard Delyon , Oded Maler On the Effects of Noise and Speed on Computations. [Citation Graph (0, 0)][DBLP ] Theor. Comput. Sci., 1994, v:129, n:2, pp:279-291 [Journal ] Yonit Kesten , Oded Maler , Monica Marcus , Amir Pnueli , Elad Shahar Symbolic model checking with rich assertional languages. [Citation Graph (0, 0)][DBLP ] Theor. Comput. Sci., 2001, v:256, n:1-2, pp:93-112 [Journal ] Oded Maler A Decomposition Theorem for Probabilistic Transition Systems. [Citation Graph (0, 0)][DBLP ] Theor. Comput. Sci., 1995, v:145, n:1&2, pp:391-396 [Journal ] Oded Maler , Ludwig Staiger On Syntactic Congruences for Omega-Languages. [Citation Graph (0, 0)][DBLP ] Theor. Comput. Sci., 1997, v:183, n:1, pp:93-112 [Journal ] Oded Maler , Dejan Nickovic , Amir Pnueli On Synthesizing Controllers from Bounded-Response Properties. [Citation Graph (0, 0)][DBLP ] CAV, 2007, pp:95-107 [Conf ] Grégory Batt , Ramzi Ben Salah , Oded Maler On Timed Models of Gene Networks. [Citation Graph (0, 0)][DBLP ] FORMATS, 2007, pp:38-52 [Conf ] Dejan Nickovic , Oded Maler AMT: A Property-Based Monitoring Tool for Analog Systems. [Citation Graph (0, 0)][DBLP ] FORMATS, 2007, pp:304-319 [Conf ] Using Redundant Constraints for Refinement. [Citation Graph (, )][DBLP ] Checking Temporal Properties of Discrete, Timed and Continuous Behaviors. [Citation Graph (, )][DBLP ] On the Krohn-Rhodes Cascaded Decomposition Theorem. [Citation Graph (, )][DBLP ] Computing Reachable States for Nonlinear Biological Models. [Citation Graph (, )][DBLP ] Compositional timing analysis. [Citation Graph (, )][DBLP ] On Scheduling Policies for Streams of Structured Jobs. [Citation Graph (, )][DBLP ] On Omega-Languages Defined by Mean-Payoff Conditions. [Citation Graph (, )][DBLP ] Accurate hybridization of nonlinear systems. [Citation Graph (, )][DBLP ] Amir Pnueli and the dawn of hybrid systems. [Citation Graph (, )][DBLP ] On timed components and their abstraction. [Citation Graph (, )][DBLP ] Approximating the Pareto Front of Multi-criteria Optimization Problems. [Citation Graph (, )][DBLP ] Approximating Continuous Systems by Timed Automata. [Citation Graph (, )][DBLP ] Sensitive state-space exploration. [Citation Graph (, )][DBLP ] Reachability for Continuous and Hybrid Systems. [Citation Graph (, )][DBLP ] Search in 0.020secs, Finished in 0.026secs