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Ippei Tate: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Yoshiyasu Ogasawara, Ippei Tate, Satoshi Watanabe, Mikiko Sato, Koichi Sasada, Kaname Uchikura, Kazunari Asano, Mitaro Namiki, Hironori Nakajo
    Towards Reconfigurable Cache Memory for a Multithreaded Processor. [Citation Graph (0, 0)][DBLP]
    PDPTA, 2006, pp:916-924 [Conf]
  2. Ippei Tate, Yoshiyasu Ogasawara, Mikiko Sato, Koichi Sasada, Kaname Uchikura, Kazunari Asano, Satoshi Watanabe, Mitaro Namiki, Hironori Nakajo
    A Model of Implementable SMT Processor on FPGA. [Citation Graph (0, 0)][DBLP]
    PDPTA, 2006, pp:909-915 [Conf]

  3. Toward Parallel and Distributed Processing on High-Density Network with Mobile Devices. [Citation Graph (, )][DBLP]


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