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Georg Hager:
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Publications of Author
- Rolf Rabenseifner, Georg Hager, Gabriele Jost, Rainer Keller
Hybrid MPI and OpenMP Parallel Programming. [Citation Graph (0, 0)][DBLP] PVM/MPI, 2006, pp:11- [Conf]
- Gerhard Wellein, Georg Hager, Achim Basermann, Holger Fehske
Fast Sparse Matrix-Vector Multiplication for TeraFlop/s Computers. [Citation Graph (0, 0)][DBLP] VECPAR, 2002, pp:287-301 [Conf]
Efficient Temporal Blocking for Stencil Computations by Multicore-Aware Wavefront Parallelization. [Citation Graph (, )][DBLP]
Data access optimizations for highly threaded multi-core CPUs with multiple memory controllers. [Citation Graph (, )][DBLP]
The world's fastest CPU and SMP node: Some performance results from the NEC SX-9. [Citation Graph (, )][DBLP]
Hybrid MPI/OpenMP Parallel Programming on Clusters of Multi-Core SMP Nodes. [Citation Graph (, )][DBLP]
Introducing a Performance Model for Bandwidth-Limited Loop Kernels. [Citation Graph (, )][DBLP]
Data access optimizations for highly threaded multi-core CPUs with multiple memory controllers [Citation Graph (, )][DBLP]
RZBENCH: Performance evaluation of current HPC architectures using low-level and application benchmarks [Citation Graph (, )][DBLP]
A Proof of Concept for Optimizing Task Parallelism by Locality Queues [Citation Graph (, )][DBLP]
Introducing a Performance Model for Bandwidth-Limited Loop Kernels [Citation Graph (, )][DBLP]
Performance limitations for sparse matrix-vector multiplications on current multicore environments [Citation Graph (, )][DBLP]
Multi-core architectures: Complexities of performance prediction and the impact of cache topology [Citation Graph (, )][DBLP]
Multicore-aware parallel temporal blocking of stencil codes for shared and distributed memory [Citation Graph (, )][DBLP]
Efficient multicore-aware parallelization strategies for iterative stencil computations [Citation Graph (, )][DBLP]
LIKWID: A lightweight performance-oriented tool suite for x86 multicore environments [Citation Graph (, )][DBLP]
Leveraging shared caches for parallel temporal blocking of stencil codes on multicore processors and clusters [Citation Graph (, )][DBLP]
A Flexible Patch-Based Lattice Boltzmann Parallelization Approach for Heterogeneous GPU-CPU Clusters [Citation Graph (, )][DBLP]
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