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Publications of Author

1. Changpeng Fang, Steve Carr, Soner Önder, Zhenlin Wang
   Reuse-distance-based miss-rate prediction on a per instruction basis. [Citation Graph (0, 0)][DBLP]
   Memory System Performance, 2004, pp:60-68 [Conf]
   
2. Changpeng Fang, Steve Carr, Soner Önder, Zhenlin Wang
   Instruction Based Memory Distance Analysis and its Application. [Citation Graph (0, 0)][DBLP]
   IEEE PACT, 2005, pp:27-37 [Conf]
   
3. Soner Önder
   Cost Effective Memory Dependence Prediction using Speculation Levels and Color Sets. [Citation Graph (0, 0)][DBLP]
   IEEE PACT, 2002, pp:232-0 [Conf]
   
4. Soner Önder, Rajiv Gupta
   Superscalar Execution with Direct Data Forwarding. [Citation Graph (0, 0)][DBLP]
   IEEE PACT, 1998, pp:130-135 [Conf]
   
5. Soner Önder, Jun Xu, Rajiv Gupta
   Caching and Predicting Branch Sequences for Improved Fetch Effectiveness. [Citation Graph (0, 0)][DBLP]
   IEEE PACT, 1999, pp:294-302 [Conf]
   
6. Changpeng Fang, Steve Carr, Soner Önder, Zhenlin Wang
   Path-Based Reuse Distance Analysis. [Citation Graph (0, 0)][DBLP]
   CC, 2006, pp:32-46 [Conf]
   
7. Siddharth Rele, Santosh Pande, Soner Önder, Rajiv Gupta
   Optimizing Static Power Dissipation by Functional Units in Superscalar Processors. [Citation Graph (0, 0)][DBLP]
   CC, 2002, pp:261-275 [Conf]
   
8. Steve Carr, Soner Önder
   A case for a working-set-based memory hierarchy. [Citation Graph (0, 0)][DBLP]
   Conf. Computing Frontiers, 2005, pp:252-261 [Conf]
   
9. Soner Önder, Rajiv Gupta
   Instruction Wake-Up in Wide Issue Superscalars. [Citation Graph (0, 0)][DBLP]
   Euro-Par, 2001, pp:418-427 [Conf]
   
10. Soner Önder, Rajiv Gupta
    Automatic Generation of Microarchitecture Simulators. [Citation Graph (0, 0)][DBLP]
    ICCL, 1998, pp:80-89 [Conf]
    
11. Soner Önder, Rajiv Gupta
    Load and store reuse using register file contents. [Citation Graph (0, 0)][DBLP]
    ICS, 2001, pp:289-302 [Conf]
    
12. Peng Zhou, Soner Önder, Steve Carr
    Fast branch misprediction recovery in out-of-order superscalar processors. [Citation Graph (0, 0)][DBLP]
    ICS, 2005, pp:41-50 [Conf]
    
13. Changpeng Fang, Steve Carr, Soner Önder, Zhenlin Wang
    Feedback-directed memory disambiguation through store distance analysis. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:278-287 [Conf]
    
14. Soner Önder, Rajiv Gupta
    Dynamic Memory Disambiguation in the Presence of Out-of-Order Store Issuing. [Citation Graph (0, 0)][DBLP]
    MICRO, 1999, pp:170-176 [Conf]
    
15. Soner Önder, Rajiv Gupta
    Dynamic Memory Disambiguation in the Presence of Out-of-order Store Issuing. [Citation Graph (0, 0)][DBLP]
    J. Instruction-Level Parallelism, 2002, v:4, n:, pp:- [Journal]
    
16. 
    Unrestricted Code Motion: A Program Representation and Transformation Algorithms Based on Future Values. [Citation Graph (, )][DBLP]
    
    
17. 
    Improving single-thread performance with fine-grain state maintenance. [Citation Graph (, )][DBLP]