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Ilya Ganusov:
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- Ilya Ganusov, Martin Burtscher
On the importance of optimizing the configuration of stream prefetchers. [Citation Graph (0, 0)][DBLP] Memory System Performance, 2005, pp:54-61 [Conf]
- Ilya Ganusov, Martin Burtscher
Future Execution: A Hardware Prefetching Technique for Chip Multiprocessors. [Citation Graph (0, 0)][DBLP] IEEE PACT, 2005, pp:350-360 [Conf]
- Ilya Ganusov, Martin Burtscher
Efficient emulation of hardware prefetchers via event-driven helper threading. [Citation Graph (0, 0)][DBLP] PACT, 2006, pp:144-153 [Conf]
- Martin Burtscher, Ilya Ganusov
Automatic Synthesis of High-Speed Processor Simulators. [Citation Graph (0, 0)][DBLP] MICRO, 2004, pp:55-66 [Conf]
- Christianto C. Liu, Ilya Ganusov, Martin Burtscher, Sandip Tiwari
Bridging the Processor-Memory Performance Gapwith 3D IC Technology. [Citation Graph (0, 0)][DBLP] IEEE Design & Test of Computers, 2005, v:22, n:6, pp:556-564 [Journal]
- Ilya Ganusov, Martin Burtscher
Future execution: A prefetching mechanism that uses multiple cores to speed up single threads. [Citation Graph (0, 0)][DBLP] TACO, 2006, v:3, n:4, pp:424-449 [Journal]
- Martin Burtscher, Ilya Ganusov, Sandra J. Jackson, Jian Ke, Paruj Ratanaworabhan, Nana B. Sam
The VPC Trace-Compression Algorithms. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 2005, v:54, n:11, pp:1329-1344 [Journal]
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