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Viresh Rustagi: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Christopher A. Healy, Mikael Sjödin, Viresh Rustagi, David B. Whalley
    Bounding Loop Iterations for Timing Analysis. [Citation Graph (0, 0)][DBLP]
    IEEE Real Time Technology and Applications Symposium, 1998, pp:12-21 [Conf]
  2. Frank Mueller, Viresh Rustagi, Ted Baker
    MiThOS - A Real-Time Micro-Kernel Threads Operating System. [Citation Graph (0, 0)][DBLP]
    IEEE Real-Time Systems Symposium, 1995, pp:49-55 [Conf]
  3. John Nickolls, L. J. Madar III, Scott Johnson, Viresh Rustagi, Ken Unger, Mustafiz Choudhury
    Calisto: A Low-Power Single-Chip Multiprocessor Communications Platform. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2003, v:23, n:2, pp:29-43 [Journal]
  4. Christopher A. Healy, Mikael Sjödin, Viresh Rustagi, David B. Whalley, Robert van Engelen
    Supporting Timing Analysis by Automatic Bounding of Loop Iterations. [Citation Graph (0, 0)][DBLP]
    Real-Time Systems, 2000, v:18, n:2/3, pp:129-156 [Journal]

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