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Publications of Author

1. Mauricio Ayala-Rincón, Ricardo P. Jacobi, Luis G. A. Carvalho, Carlos H. Llanos, Reiner W. Hartenstein
   Modeling and prototyping dynamically reconfigurable systems for efficient computation of dynamic programming methods by rewriting-logic. [Citation Graph (0, 0)][DBLP]
   SBCCI, 2004, pp:248-253 [Conf]
   
2. Mauricio Ayala-Rincón, Rodrigo B. Nogueira, Carlos H. Llanos, Ricardo P. Jacobi, Reiner W. Hartenstein
   Modeling a Reconfigurable System for Computing the FFT in Place via Rewriting-Logic. [Citation Graph (0, 0)][DBLP]
   SBCCI, 2003, pp:205-210 [Conf]
   
3. Mauricio Ayala-Rincón, Rodrigo B. Nogueira, Carlos H. Llanos, Ricardo P. Jacobi, Reiner W. Hartenstein
   Efficient Computation of Algebraic Operations over Dynamically Reconfigurable Systems Specified by Rewriting-Logic Environments. [Citation Graph (0, 0)][DBLP]
   SCCC, 2003, pp:60-0 [Conf]
   
4. Ricardo P. Jacobi, Mauricio Ayala-Rincón, Luis G. A. Carvalho, Carlos H. Llanos, Reiner W. Hartenstein
   Reconfigurable Systems for Sequence Alignment and for General Dynamic Programming. [Citation Graph (0, 0)][DBLP]
   WOB, 2004, pp:25-32 [Conf]
   
5. Mauricio Ayala-Rincón, Rinaldi Maya Neto, Ricardo P. Jacobi, Carlos H. Llanos, Reiner W. Hartenstein
   Applying ELAN Strategies in Simulating Processors over Simple Architectures. [Citation Graph (0, 0)][DBLP]
   Electr. Notes Theor. Comput. Sci., 2002, v:70, n:6, pp:- [Journal]
   
6. Mauricio Ayala-Rincón, Reiner W. Hartenstein, Rinaldi Maya Neto, Ricardo P. Jacobi, Carlos H. Llanos
   Architectural Specification, Exploration and Simulation Through Rewriting-Logic. [Citation Graph (0, 0)][DBLP]
   Revista Comlombiana de Computación, 2002, v:3, n:2, pp:- [Journal]
   
7. Mauricio Ayala-Rincón, Carlos H. Llanos, Ricardo P. Jacobi, Reiner W. Hartenstein
   Prototyping time- and space-efficient computations of algebraic operations over dynamically reconfigurable systems modeled by rewriting-logic. [Citation Graph (0, 0)][DBLP]
   ACM Trans. Design Autom. Electr. Syst., 2006, v:11, n:2, pp:251-281 [Journal]
   
8. Azzedine Boukerche, Jan M. Correa, Alba Cristina Magalhaes Alves de Melo, Ricardo P. Jacobi, Adson F. Rocha
   Reconfigurable Architecture for Biological Sequence Comparison in Reduced Memory Space. [Citation Graph (0, 0)][DBLP]
   IPDPS, 2007, pp:1-8 [Conf]
   
9. 
   An FPGA-Based Accelerator for Multiple Biological Sequence Alignment with DIALIGN. [Citation Graph (, )][DBLP]
   
   
10. 
    Challenges of the nanoscale era. [Citation Graph (, )][DBLP]
    
    
11. 
    Using Rewriting-Logic Notation for Funcional Verification in Data-Stream Based Reconfigurable Computing. [Citation Graph (, )][DBLP]