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B. Earl Wells: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Rami A. AL-Na'mneh, W. David Pan, B. Earl Wells
    Two parallel implementations for one dimension FFT on symmetric multiprocessors. [Citation Graph (0, 0)][DBLP]
    ACM Southeast Regional Conference, 2004, pp:273-278 [Conf]
  2. A. H. Abou-Ali, S. M. Abd-El-Moetty, B. Earl Wells
    Re-Configurable Hardware Based Fractal Neural Processor. [Citation Graph (0, 0)][DBLP]
    ISCA PDCS, 2006, pp:187-192 [Conf]
  3. Swathi Tanjore Gurumani, Mathew M. Noel, B. Earl Wells, Thomas C. Jannett
    Performance Analysis of Coarse-Grained Parallel Particle Swarm Optimization. [Citation Graph (0, 0)][DBLP]
    ISCA PDCS, 2006, pp:197-202 [Conf]
  4. Zexin Pan, Srikanth Venkateswaran, Swathi Tanjore Gurumani, B. Earl Wells
    Exploiting Fine-Grain Parallelism of IDEA Using Xilinx FPGA. [Citation Graph (0, 0)][DBLP]
    ISCA PDCS, 2003, pp:377-382 [Conf]
  5. Saleh H. Al-Sharaeh, B. Earl Wells
    A Scalable Three-Dimensional Domain Decomposition Mapping Technique Using MPI. [Citation Graph (0, 0)][DBLP]
    Computers and Their Applications, 2003, pp:369-372 [Conf]
  6. Kenneth G. Ricks, David Jeff Jackson, B. Earl Wells
    A Survey and Analysis of Existing Constraint Combination Formalisms and Their Applications to Software Systems Having Client-Server Relationships. [Citation Graph (0, 0)][DBLP]
    Computers and Their Applications, 2003, pp:248-253 [Conf]
  7. Kenneth G. Ricks, David Jeff Jackson, B. Earl Wells
    More Accurate Semantics Defining Constraint Combination for Software Systems Having Client-Server Relationships. [Citation Graph (0, 0)][DBLP]
    Computers and Their Applications, 2003, pp:269-274 [Conf]
  8. S. M. Loo, B. Earl Wells, J. D. Winningham
    A Genetic Algorithm Approach to Static Task Scheduling in a Reconfigurable Hardware Environment. [Citation Graph (0, 0)][DBLP]
    Computers and Their Applications, 2003, pp:36-39 [Conf]
  9. Zexin Pan, Juanjo Noguera, B. Earl Wells
    Improved Microarchitecture Support for Dynamic Task Scheduling on Reconfigurable Architectures. [Citation Graph (0, 0)][DBLP]
    ERSA, 2005, pp:182-188 [Conf]
  10. Yahya M. Tashtoush, B. Earl Wells, Thomas C. Jannett
    Applying Fuzzy-Reinforcement Learning to Track a Mobile Target Using a Wireless Sensor Network. [Citation Graph (0, 0)][DBLP]
    ICWN, 2005, pp:427-433 [Conf]
  11. S. M. Loo, B. Earl Wells, R. K. Gaede
    Exploring the Hardware/Software Continuum in a Computer Engineering Capstone Design Class Using FPGA-based Programmable Logic. [Citation Graph (0, 0)][DBLP]
    MSE, 2001, pp:36-37 [Conf]
  12. A. Abdelmageed Elsadek, Salleh Alsharaeh, B. Earl Wells, Nagendra Singh
    Parallel Three-Dimensional Particle-In-Cell Code Simulation on a Cluster of Heterogeneous Workstation. [Citation Graph (0, 0)][DBLP]
    PDPTA, 1997, pp:701-707 [Conf]
  13. A. Abdelmageed Elsadek, B. Earl Wells
    Heuristic Model for Task Allocation in a Heterogeneous Distributed Computing System. [Citation Graph (0, 0)][DBLP]
    PDPTA, 1996, pp:659-674 [Conf]
  14. Sin Ming Loo, B. Earl Wells, Nagendra Singh, Edith P. Huang
    Case Study: A Portable Parallel Particle-In-Cell Code Simulation. [Citation Graph (0, 0)][DBLP]
    PDPTA, 1999, pp:1488-1494 [Conf]
  15. Kenneth G. Ricks, David Jeff Jackson, B. Earl Wells
    The Application of Software Process Precedence Relationship Formalisms to Concurrent Hardware Systems. [Citation Graph (0, 0)][DBLP]
    PDPTA, 2003, pp:1532-1538 [Conf]
  16. John M. Weir, B. Earl Wells
    An Agent Inspired Reconfigurable Computing Implementation of a Genetic Algorithm. [Citation Graph (0, 0)][DBLP]
    PDPTA, 2003, pp:410-416 [Conf]
  17. B. Earl Wells, John Glaese
    Applying Parallel and Distributed Processing Techniques to a Tether Dynamics Simulation. [Citation Graph (0, 0)][DBLP]
    PDPTA, 1997, pp:667-673 [Conf]
  18. B. Earl Wells, Kenneth G. Ricks
    Applying.Parallel Block Predictor-Corrector Methods to Transputer Type Configurations. [Citation Graph (0, 0)][DBLP]
    PDPTA, 1997, pp:937-946 [Conf]
  19. B. Earl Wells, Christian Tournes, Lee Young
    A Case Study: In Support of Employing a Transputer-Style Architecture for Avionics Mission and Information Processing. [Citation Graph (0, 0)][DBLP]
    PDPTA, 1997, pp:957-966 [Conf]
  20. Hamid Reza Naji, B. Earl Wells, Letha H. Etzkorn
    Creating an adaptive embedded system by applying multi-agent techniques to reconfigurable hardware. [Citation Graph (0, 0)][DBLP]
    Future Generation Comp. Syst., 2004, v:20, n:6, pp:1055-1081 [Journal]
  21. Kenneth G. Ricks, John M. Weirs, B. Earl Wells
    SADL: Simulation Architecture Description Language. [Citation Graph (0, 0)][DBLP]
    I. J. Comput. Appl., 2002, v:9, n:3, pp:126-138 [Journal]
  22. Kenneth G. Ricks, John M. Weirs, B. Earl Wells
    SADL: Simulation Architecture Description Language Kenneth. [Citation Graph (0, 0)][DBLP]
    ISCA PDCS, 2001, pp:219-224 [Conf]
  23. Hamid Reza Naji, B. Earl Wells, Mohamed Aborizka
    Hardware Agents. [Citation Graph (0, 0)][DBLP]
    ISCA Conference on Intelligent Systems, 2002, pp:77-82 [Conf]

  24. Dynamic Power Management in Power-Aware Reconfigurable System-on-Chip Architectures. [Citation Graph (, )][DBLP]


  25. Energy-Efficient Dynamic Task Scheduling Algorithm for Reconfigurable System-on-Chip Architectures. [Citation Graph (, )][DBLP]


  26. An Improved Heuristic Model for Task Allocation in Distributed Computer Systems . [Citation Graph (, )][DBLP]


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