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Publications of Author

1. Sami A. Al-Arian, Hari P. Kunamneni
   Three approaches to design fault tolerant programmable logic arrays. [Citation Graph (0, 0)][DBLP]
   ACM Southeast Regional Conference, 1990, pp:151-158 [Conf]
   
2. Bassam Shaer, Sami A. Al-Arian, David L. Landis
   Partitioning algorithm to enhance VLSI testability. [Citation Graph (0, 0)][DBLP]
   ACM Southeast Regional Conference, 1998, pp:121-129 [Conf]
   
3. Musaed A. Al-Kharji, Sami A. Al-Arian
   A New Heuristic Algorithm for Estimating Signal and Detection Probabilities. [Citation Graph (0, 0)][DBLP]
   Great Lakes Symposium on VLSI, 1997, pp:26-31 [Conf]
   
4. Bassam Shaer, Sami A. Al-Arian, David L. Landis
   Pseudo-Exhaustive Testing of Sequential Circuits. [Citation Graph (0, 0)][DBLP]
   Great Lakes Symposium on VLSI, 1999, pp:109-0 [Conf]
   
5. Sami A. Al-Arian, Musaed A. Al-Kharji
   Fault Simulation and Test Generation by Fault Sampling Techniques. [Citation Graph (0, 0)][DBLP]
   ICCD, 1992, pp:365-368 [Conf]
   
6. Sami A. Al-Arian, Hussam Y. Abujbara, Jim C. Ruel
   A Unique Approach to Built-in-Self-Test Circuit Design. [Citation Graph (0, 0)][DBLP]
   ICCD, 1991, pp:270-274 [Conf]
   
7. Sami A. Al-Arian, Randy E. Bolling
   Improving the Testability of VLSI Circuits through Partitioning. [Citation Graph (0, 0)][DBLP]
   ISCAS, 1994, pp:199-202 [Conf]
   
8. Randy E. Bolling, Sami A. Al-Arian
   Reconfigurable Linear Feedback Register Design, Analysis & Applications. [Citation Graph (0, 0)][DBLP]
   ISCAS, 1994, pp:87-90 [Conf]
   
9. Sami A. Al-Arian
   Design and Test in the Universities. [Citation Graph (0, 0)][DBLP]
   ITC, 1989, pp:245-245 [Conf]
   
10. Sami A. Al-Arian, Kevin A. Kwiat
    Defining a Standard for Fault Simulator Evaluation. [Citation Graph (0, 0)][DBLP]
    ITC, 1988, pp:1001- [Conf]
    
11. Dharma P. Agrawal, Sami A. Al-Arian
    Comprehensive Fault Model and Testing of CMOS Circuits. [Citation Graph (0, 0)][DBLP]
    ITC, 1984, pp:218-223 [Conf]
    
12. Hussam Y. Abujbara, Sami A. Al-Arian
    Self-testing and self-reconfiguration architecture for 2-D WSI arrays. [Citation Graph (0, 0)][DBLP]
    SPDP, 1990, pp:527-530 [Conf]
    
13. Stephan P. Athan, David L. Landis, Sami A. Al-Arian
    A novel built-in current sensor for I/sub DDQ/ testing of deep submicron CMOS ICs. [Citation Graph (0, 0)][DBLP]
    VTS, 1996, pp:118-123 [Conf]
    
14. Warren H. Debany Jr., Kevin A. Kwiat, Sami A. Al-Arian
    A Method for Consistent Fault Coverage Reporting. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1993, v:10, n:3, pp:68-79 [Journal]
    
15. Bassam Shaer, David L. Landis, Sami A. Al-Arian
    Partitioning algorithm to enhance pseudoexhaustive testing of digital VLSI circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2000, v:8, n:6, pp:750-754 [Journal]
    
16. Bassam Shaer, Sami A. Al-Arian, David L. Landis
    Partitioning sequential circuits for pseudoexhaustive testing. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2000, v:8, n:5, pp:534-541 [Journal]