Mitsumasa Koyanagi A New Chip Architecture for VLSIs - Optical Coupled 3D Common Memory and Optical Interconnections. [Citation Graph (0, 0)][DBLP] VLSI, 1991, pp:377-386 [Conf]
Three-dimensional integration technology and integrated systems. [Citation Graph (, )][DBLP]
Development of a High Speed Vision System for Mobile Robots. [Citation Graph (, )][DBLP]
Development of a new self-assembled die bonder to three-dimensionally stack known good dies in batch. [Citation Graph (, )][DBLP]
A parallel ADC for high-speed CMOS image processing system with 3D structure. [Citation Graph (, )][DBLP]
3D integration technology for 3D stacked retinal chip. [Citation Graph (, )][DBLP]
Micro-Raman spectroscopy analysis and capacitance - time (C-t) measurement of thinned silicon substrates for 3D integration. [Citation Graph (, )][DBLP]
10 µm fine pitch Cu/Sn micro-bumps for 3-D super-chip stack. [Citation Graph (, )][DBLP]
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