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Philippe Joubert:
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- Michel Banâtre, Philippe Joubert, Christine Morin, Gilles Muller, Bruno Rochat
Using dynamic atomic actions to build fault tolerant systems. [Citation Graph (0, 0)][DBLP] ACM SIGOPS European Workshop, 1992, pp:- [Conf]
- Michel Banâtre, Philippe Joubert, Christine Morin, Gilles Muller, Bruno Rochat, P. Sanchez
Stable transactional memories and fault tolerant architectures. [Citation Graph (0, 0)][DBLP] ACM SIGOPS European Workshop, 1990, pp:- [Conf]
- Philippe Joubert, Robert B. King, Richard Neves, Mark Russinovich, John M. Tracey
High-Performance Memory-Based Web Servers: Kernel and User-Space Performance. [Citation Graph (0, 0)][DBLP] USENIX Annual Technical Conference, General Track, 2001, pp:175-187 [Conf]
- Elbert C. Hu, Philippe Joubert, Robert B. King, Jason D. LaVoie, John M. Tracey
Adaptive Fast Path Architecture. [Citation Graph (0, 0)][DBLP] IBM Journal of Research and Development, 2001, v:45, n:2, pp:191-206 [Journal]
- Alain Gefflaut, Philippe Joubert
SPAM: A Multiprocessor Execution-Driven Simulation Kernel. [Citation Graph (0, 0)][DBLP] Int. Journal in Computer Simulation, 1996, v:6, n:1, pp:69-0 [Journal]
- Nathalie Drach, Alain Gefflaut, Philippe Joubert, André Seznec
About Cache Associativity in Low-Cost Shared Memory Multi-Microprocessors. [Citation Graph (0, 0)][DBLP] Parallel Processing Letters, 1995, v:5, n:, pp:475-487 [Journal]
- Michel Banâtre, Philippe Joubert, Christine Morin, Gilles Muller, Bruno Rochat, P. Sanchez
Stable Transactional Memories and Fault Tolerant Architectures. [Citation Graph (0, 0)][DBLP] Operating Systems Review, 1991, v:25, n:1, pp:68-72 [Journal]
- C. Bryce, Daniel Hagimont, Philippe Joubert, Christine Morin, Gilles Muller, Bruno Rochat
Models and Paradigms for Distributed Systems Structuring - Summary of Sessions. [Citation Graph (0, 0)][DBLP] Operating Systems Review, 1993, v:27, n:2, pp:56-60 [Journal]
- Michel Banâtre, Alain Gefflaut, Philippe Joubert, Christine Morin, Peter W. Lee
An Architecture for Tolerating Processor Failures in Shared Memory Multiprocessors. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 1996, v:45, n:10, pp:1101-1115 [Journal]
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