The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

D. Bhatia: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. D. Bhatia
    Restructuring wafers for maximum yield and some applications of WSI. [Citation Graph (0, 0)][DBLP]
    SPDP, 1990, pp:750-753 [Conf]
  2. R. Manimegalai, E. Siva Soumya, V. Muralidharan, Balaraman Ravindran, V. Kamakoti, D. Bhatia
    Placement and Routing for 3D-FPGAs Using Reinforcement Learning and Support Vector Machines. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2005, pp:451-456 [Conf]
  3. P. Kannan, D. Bhatia
    Interconnect estimation for FPGAs. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2006, v:25, n:8, pp:1523-1534 [Journal]
  4. D. Bhatia, A. Sharma
    New-invexity type conditions with applications to constrained dynamic games. [Citation Graph (0, 0)][DBLP]
    European Journal of Operational Research, 2003, v:148, n:1, pp:48-55 [Journal]

Search in 0.001secs, Finished in 0.001secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002