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Publications of Author

1. Venkatesh Raman, Sarnath Ramnath
   Improved Upper Bounds for Time-Space Tradeoffs for Selection with Limited Storage. [Citation Graph (0, 0)][DBLP]
   SWAT, 1998, pp:131-142 [Conf]
   
2. Sarnath Ramnath
   Forewarned Is Fore-Armed: Dynamic Digraph Connectivity with Lookahead Speeds Up a Static Clustering Algorithm. [Citation Graph (0, 0)][DBLP]
   SWAT, 2002, pp:220-229 [Conf]
   
3. Sarnath Ramnath, Hong Shen
   A Centroid Labeling Technique and its Application to Path Selection in Trees (Extended Abstract). [Citation Graph (0, 0)][DBLP]
   WADS, 1997, pp:368-377 [Conf]
   
4. Sarnath Ramnath, Venkatesh Raman
   Selecting Small Ranks in EREW PRAM. [Citation Graph (0, 0)][DBLP]
   Inf. Process. Lett., 1999, v:71, n:5-6, pp:183-186 [Journal]
   
5. Sarnath Ramnath, Sivaprakasam Sunder
   On Two-Processor Scheduling and Maximum Matching in Permutation Graphs. [Citation Graph (0, 0)][DBLP]
   Inf. Process. Lett., 1996, v:57, n:6, pp:321-327 [Journal]
   
6. Sarnath Ramnath, Peiyi Zhao
   On the isomorphism of expressions. [Citation Graph (0, 0)][DBLP]
   Inf. Process. Lett., 2000, v:74, n:3-4, pp:97-102 [Journal]
   
7. Hong Shen, Sarnath Ramnath
   Optimal Parallel Selection in Sorted Matrices. [Citation Graph (0, 0)][DBLP]
   Inf. Process. Lett., 1996, v:59, n:3, pp:117-122 [Journal]
   
8. Sarnath Ramnath, Brahma Dathan
   Pattern Integration: Emphasizing the De-Coupling of Software Subsystems in Conjunction with the Use of Design Patterns. [Citation Graph (0, 0)][DBLP]
   Journal of Object Technology, 2003, v:2, n:2, pp:7-16 [Journal]
   
9. Venkatesh Raman, Sarnath Ramnath
   Improved Upper Bounds for Time-Space Trade-offs for Selection. [Citation Graph (0, 0)][DBLP]
   Nord. J. Comput., 1999, v:6, n:2, pp:162-180 [Journal]
   
10. Sarnath Ramnath
    DTML is Logspace Hard under NC¹ Reductions. [Citation Graph (0, 0)][DBLP]
    Parallel Processing Letters, 1992, v:2, n:, pp:189-193 [Journal]
    
11. Sarnath Ramnath
    Dynamic Digraph Connectivity Hastens Minimum Sum-of-Diameters Clustering. [Citation Graph (0, 0)][DBLP]
    SIAM J. Discrete Math., 2004, v:18, n:2, pp:272-286 [Journal]
    
12. Sarnath Ramnath
    New approximations for the rectilinear Steiner arborescence problem [VLSI layout]. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2003, v:22, n:7, pp:859-869 [Journal]
    
13. 
    Evolving an integrated curriculum for object-oriented analysis and design. [Citation Graph (, )][DBLP]