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Nigel P. Topham: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Rahman Hassan, Antony Harris, Nigel P. Topham, Aristides Efthymiou
    Synthetic Trace-Driven Simulation of Cache Memory. [Citation Graph (0, 0)][DBLP]
    AINA Workshops (1), 2007, pp:764-771 [Conf]
  2. Peter L. Bird, Nigel P. Topham, Sathiamoorthy Manoharan
    A Comparison of Two Memory Models for High Performance Computers. [Citation Graph (0, 0)][DBLP]
    CONPAR, 1992, pp:399-404 [Conf]
  3. Marcio Merino Fernandes, Josep Llosa, Nigel P. Topham
    Allocating Lifetimes to Queues in Software Pipelined Architectures. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 1997, pp:1066-1073 [Conf]
  4. G. P. Jones, Nigel P. Topham
    A Limitation Study into Access Decoupling. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 1997, pp:1102-1111 [Conf]
  5. Sathiamoorthy Manoharan, Nigel P. Topham, A. W. R. Crawford
    Trace-Driven Simulation of Decoupled Architectures. [Citation Graph (0, 0)][DBLP]
    HICSS (1), 1994, pp:271-279 [Conf]
  6. Marcio Merino Fernandes, Josep Llosa, Nigel P. Topham
    Distributed Modulo Scheduling. [Citation Graph (0, 0)][DBLP]
    HPCA, 1999, pp:130-134 [Conf]
  7. Nigel P. Topham, Kenneth McDougall
    Performance of the decoupled ACRI-1 architecture: the perfect club. [Citation Graph (0, 0)][DBLP]
    HPCN Europe, 1995, pp:472-480 [Conf]
  8. Peter L. Bird, Alasdair Rawsthorne, Nigel P. Topham
    The Effectiveness of Decoupling. [Citation Graph (0, 0)][DBLP]
    International Conference on Supercomputing, 1993, pp:47-56 [Conf]
  9. Antonio González, Mateo Valero, Nigel P. Topham, Joan-Manuel Parcerisa
    Eliminating Cache Conflict Misses through XOR-Based Placement Functions. [Citation Graph (0, 0)][DBLP]
    International Conference on Supercomputing, 1997, pp:76-83 [Conf]
  10. Marcio Merino Fernandes, Josep Llosa, Nigel P. Topham
    Partitioned Schedules for Clustered VLIW Architectures. [Citation Graph (0, 0)][DBLP]
    IPPS/SPDP, 1998, pp:386-391 [Conf]
  11. José-Lorenzo Cruz, Antonio González, Mateo Valero, Nigel P. Topham
    Multiple-banked register file architectures. [Citation Graph (0, 0)][DBLP]
    ISCA, 2000, pp:316-325 [Conf]
  12. Roland N. Ibbett, P. C. Capon, Nigel P. Topham
    MU6V: A Parallel Vector Processing System. [Citation Graph (0, 0)][DBLP]
    ISCA, 1985, pp:136-144 [Conf]
  13. G. P. Jones, Nigel P. Topham
    A Comparison of Data Prefetching on an Access Decoupled and Superscalar Machine. [Citation Graph (0, 0)][DBLP]
    MICRO, 1997, pp:65-70 [Conf]
  14. Nigel P. Topham, Antonio González, José González
    The Design and Performance of a Conflict-Avoiding Cache. [Citation Graph (0, 0)][DBLP]
    MICRO, 1997, pp:71-80 [Conf]
  15. T. Harris, Nigel P. Topham
    Performance of Weak Consistency Schemes on the DEC Alpha. [Citation Graph (0, 0)][DBLP]
    PARCO, 1993, pp:429-436 [Conf]
  16. R. A. Hexsel, Nigel P. Topham
    The Performance of Parallel Loops on SCI-Based Memory Hierarchies. [Citation Graph (0, 0)][DBLP]
    PARCO, 1993, pp:703-706 [Conf]
  17. G. P. Jones, Nigel P. Topham
    The Effect of Restricted Instruction Issue Width on an Access Decoupled Architecture. [Citation Graph (0, 0)][DBLP]
    PARCO, 1997, pp:665-672 [Conf]
  18. Nigel P. Topham, Alasdair Rawsthorne, Callum McLean, Muriel Mewissen, Peter L. Bird
    Compiling and Optimizing for Decoupled Architectures. [Citation Graph (0, 0)][DBLP]
    SC, 1995, pp:- [Conf]
  19. Sathiamoorthy Manoharan, Nigel P. Topham
    A general bound on schedule length for independent tasks. [Citation Graph (0, 0)][DBLP]
    Parallel Computing, 1990, v:16, n:1, pp:69-73 [Journal]
  20. Sathiamoorthy Manoharan, Nigel P. Topham
    An Assessment of Assignment Schemes for Dependency Graphs. [Citation Graph (0, 0)][DBLP]
    Parallel Computing, 1995, v:21, n:1, pp:85-107 [Journal]
  21. Nigel P. Topham, Antonio González
    Randomized Cache Placement for Eliminating Conflicts. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1999, v:48, n:2, pp:185-192 [Journal]
  22. Richard Vincent Bennett, Alastair Colin Murray, Björn Franke, Nigel P. Topham
    Combining source-to-source transformations and processor instruction set extensions for the automated design-space exploration of embedded systems. [Citation Graph (0, 0)][DBLP]
    LCTES, 2007, pp:83-92 [Conf]

  23. High Speed CPU Simulation Using LTU Dynamic Binary Translation. [Citation Graph (, )][DBLP]


  24. Resource Sharing in Custom Instruction Set Extensions. [Citation Graph (, )][DBLP]


  25. Introducing control-flow inclusion to support pipelining in custom instruction set extensions. [Citation Graph (, )][DBLP]


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