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Dimitrios Kagaris: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Abhishek Pillai, Wei Zhang, Dimitrios Kagaris
    Detecting VLIW Hard Errors Cost-Effectively through a Software-Based Approach. [Citation Graph (0, 0)][DBLP]
    AINA Workshops (1), 2007, pp:811-815 [Conf]
  2. Dimitrios Kagaris, Spyros Tragoudas
    Partial Scan with Retiming. [Citation Graph (0, 0)][DBLP]
    DAC, 1993, pp:249-254 [Conf]
  3. Dimitrios Kagaris, Spyros Tragoudas
    LFSR/SR Pseudo-Exhaustive TPG in Fewer Test Cycles. [Citation Graph (0, 0)][DBLP]
    DFT, 1999, pp:130-138 [Conf]
  4. Dimitrios Kagaris, Spyros Tragoudas, Amitava Majumdar
    On-Chip Test Embedding for Multi-Weighted Random LFSRs. [Citation Graph (0, 0)][DBLP]
    DFT, 1998, pp:135-0 [Conf]
  5. Maciej Bellos, Dimitrios Kagaris, Dimitris Nikolos
    Test Set Embedding Based on Phase Shifters. [Citation Graph (0, 0)][DBLP]
    EDCC, 2002, pp:90-101 [Conf]
  6. Dimitrios Kagaris, Spyros Tragoudas, Grammati E. Pantziou, Christos D. Zaroliagis
    Quickest paths: parallelization and dynamization . [Citation Graph (0, 0)][DBLP]
    HICSS (2), 1995, pp:39-40 [Conf]
  7. Dimitrios Kagaris, Spyros Tragoudas
    Maximum independent sets on transitive graphs and their applications in testing and CAD. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1997, pp:736-740 [Conf]
  8. Dimitrios Kagaris, Fillia Makedon, Spyros Tragoudas
    On Minimizing Hardware Overhead for Pseudoexhaustive Circuit Testability. [Citation Graph (0, 0)][DBLP]
    ICCD, 1992, pp:358-364 [Conf]
  9. Dimitrios Kagaris, Spyros Tragoudas
    Pseudoexhaustive TPG with a Provably Low Number of LFSR Seeds. [Citation Graph (0, 0)][DBLP]
    ICCD, 2000, pp:42-47 [Conf]
  10. Dimitrios Kagaris, Spyros Tragoudas
    A Class of Good Characteristics Polynomials for LFSR Test Pattern Generators. [Citation Graph (0, 0)][DBLP]
    ICCD, 1994, pp:292-295 [Conf]
  11. Dimitrios Kagaris, Spyros Tragoudas
    A multiseed counter TPG with performance guarantee. [Citation Graph (0, 0)][DBLP]
    ICCD, 1996, pp:34-39 [Conf]
  12. Dimitrios Kagaris, Spyros Tragoudas, Dinesh Bhatia
    Pseudoexhaustive BIST for Sequential Circuits. [Citation Graph (0, 0)][DBLP]
    ICCD, 1993, pp:523-527 [Conf]
  13. Dimitrios Kagaris, Spyros Tragoudas, Dimitrios Karayiannis
    Nonenumerative Path Delay Fault Coverage Estimation with Optimal Algorithms. [Citation Graph (0, 0)][DBLP]
    ICCD, 1997, pp:366-371 [Conf]
  14. Dimitris Nikolos, Dimitrios Kagaris, S. Gidaros
    Diophantine-Equation Based Arithmetic Test Set Embedding. [Citation Graph (0, 0)][DBLP]
    IOLTS, 2006, pp:193-194 [Conf]
  15. Dimitrios Kagaris, Spyros Tragoudas
    Embedded cores using built-in mechanisms. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:23-26 [Conf]
  16. Dimitrios Kagaris, Spyros Tragoudas
    Generating deterministic unordered test patterns with counters. [Citation Graph (0, 0)][DBLP]
    VTS, 1996, pp:374-379 [Conf]
  17. Dimitrios Kagaris, Spyros Tragoudas, Grammati E. Pantziou, Christos D. Zaroliagis
    On the Computation of Fast Data Transmissions in Networks with Capacities and Delays. [Citation Graph (0, 0)][DBLP]
    WADS, 1995, pp:291-302 [Conf]
  18. Dimitrios Kagaris, Spyros Tragoudas
    Computational analysis of counter-based schemes for VLSI test pattern generation. [Citation Graph (0, 0)][DBLP]
    Discrete Applied Mathematics, 2001, v:110, n:2-3, pp:227-250 [Journal]
  19. Dimitrios Kagaris, Grammati E. Pantziou, Spyros Tragoudas, Christos D. Zaroliagis
    Transmissions in a network with capacities and delays. [Citation Graph (0, 0)][DBLP]
    Networks, 1999, v:33, n:3, pp:167-174 [Journal]
  20. Dimitrios Kagaris, Spyros Tragoudas
    Retiming-Based Partial Scan. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:1, pp:75-87 [Journal]
  21. Dimitrios Kagaris, Spyros Tragoudas, Amitava Majumdar
    On the Use of Counters for Reproducing Deterministic Test Sets. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:12, pp:1405-1419 [Journal]
  22. Dimitrios Kagaris
    Linear dependencies in extended LFSMs. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2002, v:21, n:7, pp:852-859 [Journal]
  23. Dimitrios Kagaris, P. Karpodinis, Dimitris Nikolos
    On Obtaining Maximum-Length Sequences for Accumulator-Based Serial TPG. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2006, v:25, n:11, pp:2578-2586 [Journal]
  24. Dimitrios Kagaris, Fillia Makedon, Spyros Tragoudas
    A method for pseudo-exhaustive test pattern generation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1994, v:13, n:9, pp:1170-1178 [Journal]
  25. Dimitrios Kagaris, Spyros Tragoudas
    On the nonenumerative path delay fault simulation problem. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2002, v:21, n:9, pp:1095-1101 [Journal]
  26. Dimitrios Kagaris, Spyros Tragoudas
    On the design of optimal counter-based schemes for test set embedding. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1999, v:18, n:2, pp:219-230 [Journal]
  27. Dimitrios Kagaris, Spyros Tragoudas, Dinesh Bhatia
    Pseudo-exhaustive built-in TPG for sequential circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1995, v:14, n:9, pp:1160-1171 [Journal]
  28. Dimitrios Kagaris, Spyros Tragoudas, Dimitrios Karayiannis
    Improved nonenumerative path-delay fault-coverage estimation based on optimal polynomial-time algorithms. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1997, v:16, n:3, pp:309-315 [Journal]
  29. Dimitrios Kagaris
    A unified method for phase shifter computation. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2005, v:10, n:1, pp:157-167 [Journal]
  30. Dimitrios Kagaris, Spyros Tragoudas
    Von Neumann hybrid cellular automata for generating deterministic test sequences. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2001, v:6, n:3, pp:308-321 [Journal]
  31. Dimitrios Kagaris, Spyros Tragoudas
    A fast algorithm for minimizing FPGA combinational and sequential modules. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 1996, v:1, n:3, pp:341-351 [Journal]
  32. Jayawant Kakade, Dimitrios Kagaris
    Phase shifts and linear dependencies. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  33. Dimitrios Kagaris, Themistoklis Haniotakis
    A Methodology for Transistor-Efficient Supergate Design. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2007, v:15, n:4, pp:488-492 [Journal]
  34. Dimitrios Kagaris, Spyros Tragoudas
    Cost-effective LFSR synthesis for optimal pseudoexhaustive BIST test sets. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1993, v:1, n:4, pp:526-536 [Journal]

  35. Cellular automata for generating deterministic test sequences. [Citation Graph (, )][DBLP]


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