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Ping Yang: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Zijiang Yang, Shiyong Lu, Ping Yang
    Itinerary-Based Access Control for Mobile Tasks in Scientific Workflows. [Citation Graph (0, 0)][DBLP]
    AINA Workshops (2), 2007, pp:506-511 [Conf]
  2. Chuanli Zhuang, Zetian Fu, Ping Yang, Xiaoshuan Zhang
    The Application of Support Vector Machine in the Potentiality Evaluation for Revegetation of Abandoned Lands from Coal Mining Activities. [Citation Graph (0, 0)][DBLP]
    CIS (1), 2005, pp:598-603 [Conf]
  3. Amit Sasturkar, Ping Yang, Scott D. Stoller, C. R. Ramakrishnan
    Policy Analysis for Administrative Role Based Access Control. [Citation Graph (0, 0)][DBLP]
    CSFW, 2006, pp:124-138 [Conf]
  4. Richard Burch, Farid N. Najm, Ping Yang, Dale E. Hocevar
    Pattern-Independent Current Estimation for Reliability Analysis of CMOS Circuits. [Citation Graph (0, 0)][DBLP]
    DAC, 1988, pp:294-299 [Conf]
  5. Georges G. E. Gielen, Mike Sottak, Mike Murray, Linda Kaye, Maria del Mar Hershenson, Kenneth S. Kundert, Philippe Magarshack, Akria Matsuzawa, Ronald A. Rohrer, Ping Yang
    Panel: When Will the Analog Design Flow Catch Up with Digital Methodology? [Citation Graph (0, 0)][DBLP]
    DAC, 2001, pp:419- [Conf]
  6. Harish Kriplani, Farid N. Najm, Ping Yang, Ibrahim N. Hajj
    Resolving Signal Correlations for Estimating Maximum Currents in CMOS Combinational Circuits. [Citation Graph (0, 0)][DBLP]
    DAC, 1993, pp:384-388 [Conf]
  7. Zijiang Yang, Shiyong Lu, Ping Yang
    Runtime Security Verification for Itinerary-Driven Mobile Agents. [Citation Graph (0, 0)][DBLP]
    DASC, 2006, pp:177-186 [Conf]
  8. Ping Yang, Qing-miao Wang
    Fault Diagnosis System for Turbo-Generator Set Based on Fuzzy Neural Network. [Citation Graph (0, 0)][DBLP]
    ICAT Workshops, 2006, pp:228-231 [Conf]
  9. Richard Burch, Farid N. Najm, Ping Yang, Timothy N. Trick
    McPOWER: a Monte Carlo approach to power estimation. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1992, pp:90-97 [Conf]
  10. Mi-Chang Chang, Jue-Hsien Chern, Ping Yang
    An accurate grid local truncation error for device simulation. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1993, pp:275-282 [Conf]
  11. Kartikeya Mayaram, Ping Yang, Jue-Hsien Chern
    Transient Three-Dimensional Mixed-Level Circuit and Device Simulation: Algorithms and Applications. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1991, pp:112-115 [Conf]
  12. Kartikeya Mayaram, Ping Yang, Jue-Hsien Chern, Richard Burch, Lawrence A. Arledge Jr., Paul F. Cox
    A Parallel Block-Diagonal Preconditioned Conjugate-Gradient Solution Algorithm for Circuit and Device Simulations. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1990, pp:446-449 [Conf]
  13. Xianfeng Fan, Hong-Zhong Huang, Jun Hu, Xu Zu, Ping Yang
    A Study of Product Development Time Based on Fuzzy Timed Workflow Net. [Citation Graph (0, 0)][DBLP]
    ICIC (2), 2006, pp:102-107 [Conf]
  14. RuiMing Xin, Wanli Zuo, Ping Yang
    An integration of Cotraining and KNN for LPU problem. [Citation Graph (0, 0)][DBLP]
    IICAI, 2005, pp:2740-2747 [Conf]
  15. Mi-Chang Chang, Jue-Hsien Chern, Ping Yang
    Efficient and Robust Path Tracing Algorithm for DC Convergence Problem. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1993, pp:1635-1638 [Conf]
  16. Ping Yang, Yifei Dong, C. R. Ramakrishnan, Scott A. Smolka
    A Provably Correct Compiler for Efficient Model Checking of Mobile Processes. [Citation Graph (0, 0)][DBLP]
    PADL, 2005, pp:113-127 [Conf]
  17. Ping Yang, Samik Basu, C. R. Ramakrishnan
    Parameterized Verification of pi-Calculus Systems. [Citation Graph (0, 0)][DBLP]
    TACAS, 2006, pp:42-57 [Conf]
  18. Ping Yang, C. R. Ramakrishnan, Scott A. Smolka
    A Logical Encoding of the pi-Calculus: Model Checking Mobile Processes Using Tabled Resolution. [Citation Graph (0, 0)][DBLP]
    VMCAI, 2003, pp:116-131 [Conf]
  19. Huan Li, Yixin Zhu, Ping Yang
    Computational analysis of M(n)/G/1/N queues with setup time. [Citation Graph (0, 0)][DBLP]
    Computers & OR, 1995, v:22, n:8, pp:829-840 [Journal]
  20. Ping Yang, Zhihua Pei, Ningbo Liao, Bing Yang
    Isomorphism identification for epicyclic gear mechanism based on mapping property and ant algorithm. [Citation Graph (0, 0)][DBLP]
    Eng. Comput. (Lond.), 2007, v:23, n:1, pp:49-54 [Journal]
  21. Huan Li, Yixin Zhu, Ping Yang, Seshu Madhavapeddy
    On M/M/1 Queues With a Smart Machine. [Citation Graph (0, 0)][DBLP]
    Queueing Syst., 1997, v:24, n:, pp:23-36 [Journal]
  22. Ping Yang, C. R. Ramakrishnan, Scott A. Smolka
    A logical encoding of the pi-calculus: model checking mobile processes using tabled resolution. [Citation Graph (0, 0)][DBLP]
    STTT, 2004, v:6, n:1, pp:38-66 [Journal]
  23. Richard Burch, Ping Yang, Paul F. Cox, Kartikeya Mayaram
    A new matrix solution technique for general circuit simulation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1993, v:12, n:2, pp:225-241 [Journal]
  24. Abhijit Chatterjee, Charles F. Machala III, Ping Yang
    A submicron DC MOSFET model for simulation of analog circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1995, v:14, n:10, pp:1193-1207 [Journal]
  25. Jue-Hsien Chern, John T. Maeda, Lawrence A. Arledge Jr., Ping Yang
    SIERRA: a 3-D device simulator for reliability modeling. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:5, pp:516-527 [Journal]
  26. Paul F. Cox, Richard Burch, Dale E. Hocevar, Ping Yang, Berton D. Epler
    Direct circuit simulation algorithms for parallel processing [VLSI]. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1991, v:10, n:6, pp:714-725 [Journal]
  27. Paul F. Cox, Richard Burch, Ping Yang, Dale E. Hocevar
    New implicit integration method for efficient latency exploitation in circuit simulation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:10, pp:1051-1064 [Journal]
  28. Joseph E. Hall, Dale E. Hocevar, Ping Yang, Michael J. McGraw
    SPIDER -- A CAD System for Modeling VLSI Metallization Patterns. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1987, v:6, n:6, pp:1023-1031 [Journal]
  29. Dale E. Hocevar, Paul F. Cox, Ping Yang
    Parametric yield optimization for MOS circuit blocks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1988, v:7, n:6, pp:645-658 [Journal]
  30. Dale E. Hocevar, Ping Yang, Timothy N. Trick, Berton D. Epler
    Transient Sensitivity Computation for MOSFET Circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1985, v:4, n:4, pp:609-620 [Journal]
  31. Kartikeya Mayaram, Jue-Hsien Chern, Ping Yang
    Algorithms for transient three-dimensional mixed-level circuit and device simulation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1993, v:12, n:11, pp:1726-1733 [Journal]
  32. Farid N. Najm, Richard Burch, Ping Yang, Ibrahim N. Hajj
    Probabilistic simulation for reliability analysis of CMOS VLSI circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1990, v:9, n:4, pp:439-450 [Journal]
  33. Farid N. Najm, Ibrahim N. Hajj, Ping Yang
    An extension of probabilistic simulation for reliability analysis of CMOS VLSI circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1991, v:10, n:11, pp:1372-1381 [Journal]
  34. K. C.-K. Weng, Ping Yang, Jue-Hsien Chern
    A Predictor/CAD Model for Buried-Channel MOS Transistors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1987, v:6, n:1, pp:4-16 [Journal]
  35. Ping Yang, Pallab K. Chatterjee
    SPICE Modeling for Small Geometry MOSFET Circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1982, v:1, n:4, pp:169-182 [Journal]
  36. Ping Yang, Dale E. Hocevar, Paul F. Cox, Charles F. Machala III, Pallab K. Chatterjee
    An Integrated and Efficient Approach for MOS VLSI Statistical Circuit Design. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1986, v:5, n:1, pp:5-14 [Journal]
  37. Daogang Peng, Hao Zhang, Ping Yang
    Reheat Steam Temperature Composite Control System Based on CMAC Neural Network and Immune PID Controller. [Citation Graph (0, 0)][DBLP]
    ISNN (1), 2007, pp:302-310 [Conf]
  38. Richard Burch, Farid N. Najm, Ping Yang, Timothy N. Trick
    A Monte Carlo approach for power estimation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1993, v:1, n:1, pp:63-71 [Journal]

  39. MIC_FS : A novel model for feature selection by mutual information guided by clustering. [Citation Graph (, )][DBLP]


  40. DINCast: Optimizing Application-Level Shared-Tree Multicast. [Citation Graph (, )][DBLP]


  41. Feature Extraction and Parameters Selection of Classification Model on Brain-Computer Interface. [Citation Graph (, )][DBLP]


  42. Efficient policy analysis for administrative role based access control. [Citation Graph (, )][DBLP]


  43. Modular Certification of Low-Level Intermediate Representation Programs. [Citation Graph (, )][DBLP]


  44. Incremental Information Flow Analysis of Role Based Access Control. [Citation Graph (, )][DBLP]


  45. Formal Modeling and Analysis of Scientific Workflows Using Hierarchical State Machines. [Citation Graph (, )][DBLP]


  46. User-Role Reachability Analysis of Evolving Administrative Role Based Access Control. [Citation Graph (, )][DBLP]


  47. An Attribute Reduction Algorithm by Rough Set Based on Binary Discernibility Matrix. [Citation Graph (, )][DBLP]


  48. A Novel Algorithm Based on Conditional Entropy Established by Clustering for Feature Selection. [Citation Graph (, )][DBLP]


  49. Continuity in an intuitionistic fuzzy normed space. [Citation Graph (, )][DBLP]


  50. Control Message Reduction Techniques in Backward Learning Ad Hoc Routing Protocols. [Citation Graph (, )][DBLP]


  51. A pixel gradient-based adaptive interpolation filter for multiple view synthesis. [Citation Graph (, )][DBLP]


  52. A Novel Hypothesis-Margin Based Method Incorporating Minimal-Redundancy Criterion for Feature Selection. [Citation Graph (, )][DBLP]


  53. A fuzzy c-means algorithm using a correlation metrics and gene ontology. [Citation Graph (, )][DBLP]


  54. The Hardware Research of Dual-port RAM for Main-spare CPU in Rural Power Terminal System of Power Quantity Collection. [Citation Graph (, )][DBLP]


  55. A Neural Network Model for Predicting Cotton Yields. [Citation Graph (, )][DBLP]


  56. A Gradient-Based Adaptive Interpolation Filter for Multiple View Synthesis. [Citation Graph (, )][DBLP]


  57. Symbolic reachability analysis for parameterized administrative role based access control. [Citation Graph (, )][DBLP]


  58. RBAC-PAT: A Policy Analysis Tool for Role Based Access Control. [Citation Graph (, )][DBLP]


  59. Scientific Workflow Provenance Querying with Security Views. [Citation Graph (, )][DBLP]


  60. Integrating R Models with Web Technologies. [Citation Graph (, )][DBLP]


  61. Updating of Attribute Reduction for the Case of Deleting. [Citation Graph (, )][DBLP]


  62. Research on a SPWM Inverter Power Supply System Based on DSP. [Citation Graph (, )][DBLP]


  63. Fault diagnosis for boilers in thermal power plant by data mining. [Citation Graph (, )][DBLP]


  64. Combining Explicitly Mask Image with Voxel-Based Morphometry for Improving 0.35T Functional MRI Data Analysis. [Citation Graph (, )][DBLP]


  65. Design of a Filter Based on Polynomial Interpolation and Local Fit. [Citation Graph (, )][DBLP]


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