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Fran Hanchek: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Fran Hanchek, Shantanu Dutt
    Node-Covering Based Defect and Fault Tolerance Methods for Increased Yield in FPGAs. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1996, pp:225-229 [Conf]
  2. Fran Hanchek, Shantanu Dutt
    Methodologies for Tolerating Cell and Interconnect Faults in FPGAs. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1998, v:47, n:1, pp:15-33 [Journal]
  3. Shantanu Dutt, Fran Hanchek
    REMOD: a new methodology for designing fault-tolerant arithmetic circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1997, v:5, n:1, pp:34-56 [Journal]

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