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Jay Roy:
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- Srinivas Katkoori, Ranga Vemuri, Jay Roy
A Hierarchical Register Optimization Algorithm for Behavioral Synthesis. [Citation Graph (0, 0)][DBLP] VLSI Design, 1996, pp:126-132 [Conf]
- Naren Narasimhan, Ranga Vemuri, Jay Roy
Synchronous Controller Models for Synthesis from Communicating VHDL Processes. [Citation Graph (0, 0)][DBLP] VLSI Design, 1996, pp:198-204 [Conf]
- Ranga Vemuri, Srinivas Katkoori, Meenakshi Kaul, Jay Roy
An efficient register optimization algorithm for high-level synthesis from hierarchical behavioral specifications. [Citation Graph (0, 0)][DBLP] ACM Trans. Design Autom. Electr. Syst., 2002, v:7, n:1, pp:189-216 [Journal]
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