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Heebyung Yoon:
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- Heebyung Yoon, Abhijit Chatterjee, Joseph L. A. Hughes
Optimal Design of Checksum-Based Checkers for Fault Detection in Linear Analog Circuits. [Citation Graph (0, 0)][DBLP] VLSI Design, 1997, pp:393-397 [Conf]
- Heebyung Yoon, Pramodchandran N. Variyam, Abhijit Chatterjee, Naveena Nagi
Hierarchical Statistical Inference Model for Specification Based Testing of Analog Circuits. [Citation Graph (0, 0)][DBLP] VTS, 1998, pp:145-151 [Conf]
- Naveena Nagi, Abhijit Chatterjee, Heebyung Yoon, Jacob A. Abraham
Signature analysis for analog and mixed-signal circuit test response compaction. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1998, v:17, n:6, pp:540-546 [Journal]
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