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Ajit Dingankar: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Sreekumar V. Kodakara, Deepak Mathaikutty, Ajit Dingankar, Sandeep K. Shukla, David J. Lilja
    Model Based Test Generation for Microprocessor Architecture Validation. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2007, pp:465-472 [Conf]
  2. Deepak Mathaikutty, Sandeep K. Shukla, Sreekumar V. Kodakara, David J. Lilja, Ajit Dingankar
    Design fault directed test generation for microprocessor validation. [Citation Graph (0, 0)][DBLP]
    DATE, 2007, pp:761-766 [Conf]

  3. Towards embedded runtime system level optimization for MPSoCs: on-chip task allocation. [Citation Graph (, )][DBLP]


  4. Power estimation methodology for a high-level synthesis framework. [Citation Graph (, )][DBLP]


  5. A Novel System-Level On-Chip Resource Allocation Method for Manycore Architectures. [Citation Graph (, )][DBLP]


  6. Assertion-Based Modal Power Estimation. [Citation Graph (, )][DBLP]


  7. A Metamodeling based Framework for Architectural Modeling and Simulator Generation. [Citation Graph (, )][DBLP]


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