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Frits W. Vaandrager: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Rob J. van Glabbeek, Frits W. Vaandrager
    Modular Specifications in Process Algebra with Curious Queues. [Citation Graph (0, 0)][DBLP]
    Algebraic Methods, 1987, pp:465-506 [Conf]
  2. Mariëlle Stoelinga, Frits W. Vaandrager
    Root Contention in IEEE 1394. [Citation Graph (0, 0)][DBLP]
    ARTS, 1999, pp:53-74 [Conf]
  3. Frits W. Vaandrager
    Verification of Hybrid Systems (abstract). [Citation Graph (0, 0)][DBLP]
    ARTS, 1999, pp:151- [Conf]
  4. Gerd Behrmann, Thomas Hune, Frits W. Vaandrager
    Distributing Timed Model Checking - How the Search Order Matters. [Citation Graph (0, 0)][DBLP]
    CAV, 2000, pp:216-231 [Conf]
  5. W. O. David Griffioen, Frits W. Vaandrager
    Normed Simulations. [Citation Graph (0, 0)][DBLP]
    CAV, 1998, pp:332-344 [Conf]
  6. Biniam Gebremichael, Frits W. Vaandrager, Miaomiao Zhang, Kees Goossens, Edwin Rijpkema, Andrei Radulescu
    Deadlock Prevention in the Æthereal Protocol. [Citation Graph (0, 0)][DBLP]
    CHARME, 2005, pp:345-348 [Conf]
  7. Rob J. van Glabbeek, Frits W. Vaandrager
    Bundle Event Structures and CCSP. [Citation Graph (0, 0)][DBLP]
    CONCUR, 2003, pp:57-71 [Conf]
  8. Nancy A. Lynch, Roberto Segala, Frits W. Vaandrager
    Compositionality for Probabilistic Automata. [Citation Graph (0, 0)][DBLP]
    CONCUR, 2003, pp:204-222 [Conf]
  9. Rocco De Nicola, Ugo Montanari, Frits W. Vaandrager
    Back and Forth Bisimulations. [Citation Graph (0, 0)][DBLP]
    CONCUR, 1990, pp:152-165 [Conf]
  10. Frits W. Vaandrager
    Verification of a Distributed Summation Algorithm. [Citation Graph (0, 0)][DBLP]
    CONCUR, 1995, pp:190-203 [Conf]
  11. Frits W. Vaandrager, Nancy A. Lynch
    Action Transducers and Timed Automata. [Citation Graph (0, 0)][DBLP]
    CONCUR, 1992, pp:436-455 [Conf]
  12. Henrik C. Bohnenkamp, Peter van der Stok, Holger Hermanns, Frits W. Vaandrager
    Cost-Optimization of the IPv4 Zeroconf Protocol. [Citation Graph (0, 0)][DBLP]
    DSN, 2003, pp:531-540 [Conf]
  13. Frits W. Vaandrager
    Introduction. [Citation Graph (0, 0)][DBLP]
    European Educational Forum: School on Embedded Systems, 1996, pp:1-3 [Conf]
  14. Biniam Gebremichael, Frits W. Vaandrager, Miaomiao Zhang
    Analysis of the zeroconf protocol using UPPAAL. [Citation Graph (0, 0)][DBLP]
    EMSOFT, 2006, pp:242-251 [Conf]
  15. Biniam Gebremichael, Frits W. Vaandrager
    Control Synthesis for a Smart Card Personalization System Using Symbolic Model Checking. [Citation Graph (0, 0)][DBLP]
    FORMATS, 2003, pp:189-203 [Conf]
  16. Martijn Hendriks, Gerd Behrmann, Kim Guldstrand Larsen, Peter Niebert, Frits W. Vaandrager
    Adding Symmetry Reduction to Uppaal. [Citation Graph (0, 0)][DBLP]
    FORMATS, 2003, pp:46-59 [Conf]
  17. Doeko Bosscher, Indra Polak, Frits W. Vaandrager
    Verification of an Audio Control Protocol. [Citation Graph (0, 0)][DBLP]
    FTRTFT, 1994, pp:170-192 [Conf]
  18. Henning Dierks, Ansgar Fehnker, Angelika Mader, Frits W. Vaandrager
    Operational and Logical Semantics for Polling Real-Time Systems. [Citation Graph (0, 0)][DBLP]
    FTRTFT, 1998, pp:29-40 [Conf]
  19. Jan Springintveld, Frits W. Vaandrager
    Minimizable Timed Automata. [Citation Graph (0, 0)][DBLP]
    FTRTFT, 1996, pp:130-147 [Conf]
  20. Gerd Behrmann, Ansgar Fehnker, Thomas Hune, Kim Guldstrand Larsen, Paul Pettersson, Judi Romijn, Frits W. Vaandrager
    Minimum-Cost Reachability for Priced Timed Automata. [Citation Graph (0, 0)][DBLP]
    HSCC, 2001, pp:147-161 [Conf]
  21. Nancy A. Lynch, Roberto Segala, Frits W. Vaandrager
    Hybrid I/O Automata Revisited. [Citation Graph (0, 0)][DBLP]
    HSCC, 2001, pp:403-417 [Conf]
  22. Nancy A. Lynch, Roberto Segala, Frits W. Vaandrager, Henri B. Weinberg
    Hybrid I/O Automata. [Citation Graph (0, 0)][DBLP]
    Hybrid Systems, 1995, pp:496-510 [Conf]
  23. Jan Friso Groote, Frits W. Vaandrager
    Structural Operational Semantics and Bisimulation as a Congruence (Extended Abstract). [Citation Graph (0, 0)][DBLP]
    ICALP, 1989, pp:423-438 [Conf]
  24. Jan Friso Groote, Frits W. Vaandrager
    An Efficient Algorithm for Branching Bisimulation and Stuttering Equivalence. [Citation Graph (0, 0)][DBLP]
    ICALP, 1990, pp:626-638 [Conf]
  25. Mariëlle Stoelinga, Frits W. Vaandrager
    A Testing Scenario for Probabilistic Automata. [Citation Graph (0, 0)][DBLP]
    ICALP, 2003, pp:464-477 [Conf]
  26. Ling Cheung, Nancy A. Lynch, Roberto Segala, Frits W. Vaandrager
    Switched Probabilistic I/O Automata. [Citation Graph (0, 0)][DBLP]
    ICTAC, 2004, pp:494-510 [Conf]
  27. Luca Aceto, Bard Bloom, Frits W. Vaandrager
    Turning SOS Rules into Equations [Citation Graph (0, 0)][DBLP]
    LICS, 1992, pp:113-124 [Conf]
  28. Rocco De Nicola, Frits W. Vaandrager
    Three Logics for Branching Bisimulation (Extended Abstract) [Citation Graph (0, 0)][DBLP]
    LICS, 1990, pp:118-129 [Conf]
  29. Frits W. Vaandrager
    On the Relationship Between Process Algebra and Input/Output Automata [Citation Graph (0, 0)][DBLP]
    LICS, 1991, pp:387-398 [Conf]
  30. Rocco De Nicola, Frits W. Vaandrager
    Action versus State based Logics for Transition Systems. [Citation Graph (0, 0)][DBLP]
    Semantics of Systems of Concurrent Processes, 1990, pp:407-419 [Conf]
  31. Rob J. van Glabbeek, Frits W. Vaandrager
    Petri Net Models for Algebraic Theories of Concurrency. [Citation Graph (0, 0)][DBLP]
    PARLE (2), 1987, pp:224-242 [Conf]
  32. Ansgar Fehnker, Frits W. Vaandrager, Miaomiao Zhang
    Modeling and Verifying a Lego Car Using Hybrid I/O Automata. [Citation Graph (0, 0)][DBLP]
    QSIC, 2003, pp:280-289 [Conf]
  33. Nancy A. Lynch, Frits W. Vaandrager
    Forward and Backward Simulations for Timing-Based Systems. [Citation Graph (0, 0)][DBLP]
    REX Workshop, 1991, pp:397-446 [Conf]
  34. Frits W. Vaandrager
    Expressive Results for Process Algebras. [Citation Graph (0, 0)][DBLP]
    REX Workshop, 1992, pp:609-638 [Conf]
  35. Dilsun Kirli Kaynar, Nancy A. Lynch, Roberto Segala, Frits W. Vaandrager
    Timed I/O Automata: A Mathematical Framework for Modeling and Analyzing Real-Time Systems. [Citation Graph (0, 0)][DBLP]
    RTSS, 2003, pp:166-177 [Conf]
  36. Biniam Gebremichael, Frits W. Vaandrager
    Specifying Urgency in Timed I/O Automata. [Citation Graph (0, 0)][DBLP]
    SEFM, 2005, pp:64-74 [Conf]
  37. Thomas Hune, Judi Romijn, Mariëlle Stoelinga, Frits W. Vaandrager
    Linear Parametric Model Checking of Timed Automata. [Citation Graph (0, 0)][DBLP]
    TACAS, 2001, pp:189-203 [Conf]
  38. Frits W. Vaandrager
    A Theory of Testing for Timed Automata (Abstract). [Citation Graph (0, 0)][DBLP]
    TAPSOFT, 1997, pp:39- [Conf]
  39. Leen Helmink, M. P. A. Sellink, Frits W. Vaandrager
    Proof-Checking a Data Link Protocol. [Citation Graph (0, 0)][DBLP]
    TYPES, 1993, pp:127-165 [Conf]
  40. Jos C. M. Baeten, Frits W. Vaandrager
    An Algebra for Process Creation. [Citation Graph (0, 0)][DBLP]
    Acta Inf., 1992, v:29, n:4, pp:303-334 [Journal]
  41. W. O. David Griffioen, Frits W. Vaandrager
    A theory of normed simulations [Citation Graph (0, 0)][DBLP]
    CoRR, 2000, v:0, n:, pp:- [Journal]
  42. Nancy A. Lynch, Frits W. Vaandrager
    Action Transducers and Timed Automata. [Citation Graph (0, 0)][DBLP]
    Formal Asp. Comput., 1996, v:8, n:5, pp:499-538 [Journal]
  43. Frits W. Vaandrager, Adriaan de Groot
    Analysis of a biphase mark protocol with Uppaaland PVS. [Citation Graph (0, 0)][DBLP]
    Formal Asp. Comput., 2006, v:18, n:4, pp:433-458 [Journal]
  44. Marco Devillers, W. O. David Griffioen, Judi Romijn, Frits W. Vaandrager
    Verification of a Leader Election Protocol: Formal Methods Applied to IEEE 1394. [Citation Graph (0, 0)][DBLP]
    Formal Methods in System Design, 2000, v:16, n:3, pp:307-320 [Journal]
  45. Luca Aceto, Bard Bloom, Frits W. Vaandrager
    Turning SOS Rules into Equations [Citation Graph (0, 0)][DBLP]
    Inf. Comput., 1994, v:111, n:1, pp:1-52 [Journal]
  46. Rob J. van Glabbeek, Frits W. Vaandrager
    The Difference between Splitting in n and n+1. [Citation Graph (0, 0)][DBLP]
    Inf. Comput., 1997, v:136, n:2, pp:109-142 [Journal]
  47. Jan Friso Groote, Frits W. Vaandrager
    Structured Operational Semantics and Bisimulation as a Congruence [Citation Graph (0, 0)][DBLP]
    Inf. Comput., 1992, v:100, n:2, pp:202-260 [Journal]
  48. Nancy A. Lynch, Roberto Segala, Frits W. Vaandrager
    Hybrid I/O automata. [Citation Graph (0, 0)][DBLP]
    Inf. Comput., 2003, v:185, n:1, pp:105-157 [Journal]
  49. Nancy A. Lynch, Frits W. Vaandrager
    Forward and Backward Simulations: I. Untimed Systems [Citation Graph (0, 0)][DBLP]
    Inf. Comput., 1995, v:121, n:2, pp:214-233 [Journal]
  50. Nancy A. Lynch, Frits W. Vaandrager
    Forward and Backward Simulations, II: Timing-Based Systems. [Citation Graph (0, 0)][DBLP]
    Inf. Comput., 1996, v:128, n:1, pp:1-25 [Journal]
  51. Judi Romijn, Frits W. Vaandrager
    A Note on Fairness in I/O Automata. [Citation Graph (0, 0)][DBLP]
    Inf. Process. Lett., 1996, v:59, n:5, pp:245-250 [Journal]
  52. Rocco De Nicola, Frits W. Vaandrager
    Three Logics for Branching Bisimulation. [Citation Graph (0, 0)][DBLP]
    J. ACM, 1995, v:42, n:2, pp:458-487 [Journal]
  53. Thomas Hune, Judi Romijn, Mariëlle Stoelinga, Frits W. Vaandrager
    Linear parametric model checking of timed automata. [Citation Graph (0, 0)][DBLP]
    J. Log. Algebr. Program., 2002, v:52, n:, pp:183-220 [Journal]
  54. Martijn Hendriks, Barend van den Nieuwelaar, Frits W. Vaandrager
    Model checker aided design of a controller for a wafer scanner. [Citation Graph (0, 0)][DBLP]
    STTT, 2006, v:8, n:6, pp:633-647 [Journal]
  55. Ling Cheung, Nancy A. Lynch, Roberto Segala, Frits W. Vaandrager
    Switched PIOA: Parallel composition via distributed scheduling. [Citation Graph (0, 0)][DBLP]
    Theor. Comput. Sci., 2006, v:365, n:1-2, pp:83-108 [Journal]
  56. Rob J. van Glabbeek, Frits W. Vaandrager
    Modular Specification of Process Algebras. [Citation Graph (0, 0)][DBLP]
    Theor. Comput. Sci., 1993, v:113, n:2, pp:293-348 [Journal]
  57. Jan Springintveld, Frits W. Vaandrager, Pedro R. D'Argenio
    Testing timed automata. [Citation Graph (0, 0)][DBLP]
    Theor. Comput. Sci., 2001, v:254, n:1-2, pp:225-257 [Journal]
  58. Frits W. Vaandrager
    Determinism - (Event Structure Isomorphism = Step Sequence Equivalence). [Citation Graph (0, 0)][DBLP]
    Theor. Comput. Sci., 1991, v:79, n:2, pp:275-294 [Journal]
  59. W. O. David Griffioen, Frits W. Vaandrager
    A theory of normed simulations. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Comput. Log., 2004, v:5, n:4, pp:577-610 [Journal]
  60. Nancy A. Lynch, Roberto Segala, Frits W. Vaandrager
    Observing Branching Structure through Probabilistic Contexts. [Citation Graph (0, 0)][DBLP]
    SIAM J. Comput., 2007, v:37, n:4, pp:977-1013 [Journal]

  61. Learning I/O Automata. [Citation Graph (, )][DBLP]


  62. Analysis of a Clock Synchronization Protocol for Wireless Sensor Networks. [Citation Graph (, )][DBLP]


  63. Compositional Abstraction in Real-Time Model Checking. [Citation Graph (, )][DBLP]


  64. Formal Modeling and Scheduling of Datapaths of Digital Document Printers. [Citation Graph (, )][DBLP]


  65. Model Checker Aided Design of a Controller for a Wafer Scanner. [Citation Graph (, )][DBLP]


  66. Adaptive Scheduling of Data Paths using Uppaal Tiga [Citation Graph (, )][DBLP]


  67. Modelling Clock Synchronization in the Chess gMAC WSN Protocol [Citation Graph (, )][DBLP]


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