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Hubert Garavel: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Hubert Garavel, Wendelin Serwe
    State Space Reduction for Process Algebra Specifications. [Citation Graph (0, 0)][DBLP]
    AMAST, 2004, pp:164-180 [Conf]
  2. Jean-Claude Fernandez, Hubert Garavel, Alain Kerbrat, Laurent Mounier, Radu Mateescu, Mihaela Sighireanu
    CADP - A Protocol Validation and Verification Toolbox. [Citation Graph (0, 0)][DBLP]
    CAV, 1996, pp:437-440 [Conf]
  3. Hubert Garavel, Frédéric Lang, Radu Mateescu
    Compiler Construction Using LOTOS NT. [Citation Graph (0, 0)][DBLP]
    CC, 2002, pp:9-13 [Conf]
  4. Manuel Aguilar Cornejo, Hubert Garavel, Radu Mateescu, Noel De Palma
    Specification and Verification of a Dynamic Reconfiguration Protocol for Agent-Based Applications. [Citation Graph (0, 0)][DBLP]
    DAIS, 2001, pp:229-244 [Conf]
  5. Flávio Oquendo, Brian Warboys, Ronald Morrison, Régis Dindeleux, Ferdinando Gallo, Hubert Garavel, Carmen Occhipinti
    ArchWare: Architecting Evolvable Software. [Citation Graph (0, 0)][DBLP]
    EWSA, 2004, pp:257-271 [Conf]
  6. Hubert Garavel, Holger Hermanns
    On Combining Functional Verification and Performance Evaluation Using CADP. [Citation Graph (0, 0)][DBLP]
    FME, 2002, pp:410-429 [Conf]
  7. Frederic Tronel, Frédéric Lang, Hubert Garavel
    Compositional Verification Using CADP of the ScalAgent Deployment Protocol for Software Components. [Citation Graph (0, 0)][DBLP]
    FMOODS, 2003, pp:244-260 [Conf]
  8. Ghassan Chehaibar, Hubert Garavel, Laurent Mounier, Nadia Tawbi, Ferruccio Zulian
    Specification and Verification of the PowerScaleTM Bus Arbitration Protocol: An Industrial Experiment with LOTOS. [Citation Graph (0, 0)][DBLP]
    FORTE, 1996, pp:435-450 [Conf]
  9. Hubert Garavel
    Compilation of LOTOS Abstract Data Types. [Citation Graph (0, 0)][DBLP]
    FORTE, 1989, pp:147-162 [Conf]
  10. Hubert Garavel, Frédéric Lang
    SVL: A Scripting Language for Compositional Verification. [Citation Graph (0, 0)][DBLP]
    FORTE, 2001, pp:377-394 [Conf]
  11. Hubert Garavel, Frédéric Lang
    NTIF: A General Symbolic Model for Communicating Sequential Processes with Data. [Citation Graph (0, 0)][DBLP]
    FORTE, 2002, pp:276-291 [Conf]
  12. Hubert Garavel, Mihaela Sighireanu
    On the Introduction of Exceptions in E-LOTOS. [Citation Graph (0, 0)][DBLP]
    FORTE, 1996, pp:469-484 [Conf]
  13. Hubert Garavel, Mihaela Sighireanu
    A Graphical Parallel Composition Operator for Process Algebras. [Citation Graph (0, 0)][DBLP]
    FORTE, 1999, pp:185-202 [Conf]
  14. Jean-Claude Fernandez, Hubert Garavel, Laurent Mounier, Anne Rasse, Carlos Rodriguez, Joseph Sifakis
    A Toolbox for the Verification of LOTOS Programs. [Citation Graph (0, 0)][DBLP]
    ICSE, 1992, pp:246-259 [Conf]
  15. Hubert Garavel
    On the introduction of gate typing in E-LOTOS. [Citation Graph (0, 0)][DBLP]
    PSTV, 1995, pp:283-298 [Conf]
  16. Hubert Garavel, Joseph Sifakis
    Compilation and verification of LOTOS specifications. [Citation Graph (0, 0)][DBLP]
    PSTV, 1990, pp:379-394 [Conf]
  17. Hubert Garavel, Radu Mateescu, Irina M. Smarandache
    Parallel State Space Construction for Model-Checking. [Citation Graph (0, 0)][DBLP]
    SPIN, 2001, pp:217-234 [Conf]
  18. Grégory Batt, Damien Bergamini, Hidde de Jong, Hubert Garavel, Radu Mateescu
    Model Checking Genetic Regulatory Networks Using GNA and CADP. [Citation Graph (0, 0)][DBLP]
    SPIN, 2004, pp:158-163 [Conf]
  19. Hubert Garavel, Radu Mateescu
    SEQ.OPEN: A Tool for Efficient Trace-Based Verification. [Citation Graph (0, 0)][DBLP]
    SPIN, 2004, pp:151-157 [Conf]
  20. Hubert Garavel
    OPEN/CÆSAR: An OPen Software Architecture for Verification, Simulation, and Testing. [Citation Graph (0, 0)][DBLP]
    TACAS, 1998, pp:68-84 [Conf]
  21. Hubert Garavel, Radu Mateescu, Damien Bergamini, Adrian Curic, Nicolas Descoubes, Christophe Joubert, Irina Smarandache-Sturm, Gilles Stragier
    DISTRIBUTOR and BCG_MERGE: Tools for Distributed Explicit State Space Generation. [Citation Graph (0, 0)][DBLP]
    TACAS, 2006, pp:445-449 [Conf]
  22. B. Algayres, V. Coelho, L. Doldi, Hubert Garavel, Y. Lejeune, C. Rodríguez
    VESAR: A Pragmatic Approach to Formal Specification and Verification. [Citation Graph (0, 0)][DBLP]
    Computer Networks and ISDN Systems, 1993, v:25, n:7, pp:779-790 [Journal]
  23. Rance Cleaveland, Hubert Garavel
    Foreword. [Citation Graph (0, 0)][DBLP]
    Electr. Notes Theor. Comput. Sci., 2002, v:66, n:2, pp:- [Journal]
  24. Hubert Garavel, Stefania Gnesi, Ina Schieferdecker
    Special issue on the Fifth International Workshop of the ERCIM Working Group on Formal Methods for Industrial Critical Systems, Berlin, April 3-4, 2000 - Selected papers. [Citation Graph (0, 0)][DBLP]
    Sci. Comput. Program., 2003, v:46, n:3, pp:195-196 [Journal]
  25. Hubert Garavel, Laurent Mounier
    Specification and Verification of Various Distributed Leader Election Algorithms for Unidirectional Ring Networks. [Citation Graph (0, 0)][DBLP]
    Sci. Comput. Program., 1997, v:29, n:1-2, pp:171-197 [Journal]
  26. Hubert Garavel, César Viho, Massimo Zendri
    System design of a CC-NUMA multiprocessor architecture using formal specification, model-checking, co-simulation, and test generation. [Citation Graph (0, 0)][DBLP]
    STTT, 2001, v:3, n:3, pp:314-331 [Journal]
  27. Hubert Garavel, John Hatcliff
    Why you should definitely read this special section. [Citation Graph (0, 0)][DBLP]
    STTT, 2006, v:8, n:1, pp:1-3 [Journal]
  28. Hubert Garavel, John Hatcliff
    TACAS 2003 Special Issue - Preface. [Citation Graph (0, 0)][DBLP]
    Theor. Comput. Sci., 2006, v:354, n:2, pp:169-172 [Journal]
  29. Hubert Garavel, Wendelin Serwe
    State space reduction for process algebra specifications. [Citation Graph (0, 0)][DBLP]
    Theor. Comput. Sci., 2006, v:351, n:2, pp:131-145 [Journal]
  30. Hubert Garavel, Radu Mateescu, Frédéric Lang, Wendelin Serwe
    CADP 2006: A Toolbox for the Construction and Analysis of Distributed Processes. [Citation Graph (0, 0)][DBLP]
    CAV, 2007, pp:158-163 [Conf]

  31. Quantitative Evaluation in Embedded System Design: Validation of Multiprocessor Multithreaded Architectures. [Citation Graph (, )][DBLP]


  32. Parallel Processes with Real-Time and Data: The ATLANTIF Intermediate Format. [Citation Graph (, )][DBLP]


  33. Verification of GALS Systems by Combining Synchronous Languages and Process Calculi. [Citation Graph (, )][DBLP]


  34. Reflections on the Future of Concurrency Theory in General and Process Calculi in Particular. [Citation Graph (, )][DBLP]


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