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Farn Wang: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Farn Wang
    Model-Checking Distributed Real-Time Systems with States, Events, and Multiple Fairness Assumptions. [Citation Graph (0, 0)][DBLP]
    AMAST, 2004, pp:553-568 [Conf]
  2. Farn Wang, Pao-Ann Hsiung
    Parametric Analysis of Computer Systems. [Citation Graph (0, 0)][DBLP]
    AMAST, 1997, pp:539-553 [Conf]
  3. Farn Wang
    Efficient Model-Checking of Timed Automata with Clock-Restriction Diagram. [Citation Graph (0, 0)][DBLP]
    APLAS, 2001, pp:207-224 [Conf]
  4. Farn Wang
    High-Level Execution Time Analysis. [Citation Graph (0, 0)][DBLP]
    ARTS, 1997, pp:325-339 [Conf]
  5. Geng-Dian Huang, Farn Wang
    Automatic Test Case Generation with Region-Related Coverage Annotations for Real-Time Systems. [Citation Graph (0, 0)][DBLP]
    ATVA, 2005, pp:144-158 [Conf]
  6. Farn Wang
    Symbolic Parametric Safety Analysis of Linear Hybrid Systems with BDD-Like Data-Structures. [Citation Graph (0, 0)][DBLP]
    CAV, 2004, pp:295-307 [Conf]
  7. Farn Wang
    Region Encoding Diagram for Fully Symbolic Verification of Real-Time Systems. [Citation Graph (0, 0)][DBLP]
    COMPSAC, 2000, pp:509-515 [Conf]
  8. Farn Wang
    Reachability Analysis at Procedure Level through Timing Coincidence. [Citation Graph (0, 0)][DBLP]
    CONCUR, 1995, pp:284-298 [Conf]
  9. Farn Wang
    Automatic Verification of Pointer Data-Structure Systems for All Numbers of Processes. [Citation Graph (0, 0)][DBLP]
    World Congress on Formal Methods, 1999, pp:328-347 [Conf]
  10. Farn Wang, Chia-Tien Dan Lo
    Procedure-Level Verification of Real-time Concurrent Systems. [Citation Graph (0, 0)][DBLP]
    FME, 1996, pp:682-701 [Conf]
  11. Farn Wang, Aloysius K. Mok
    RTL and Refutation by Positive Cycles. [Citation Graph (0, 0)][DBLP]
    FME, 1994, pp:659-680 [Conf]
  12. Farn Wang, Aloysius K. Mok, E. Allen Emerson
    Symbolic Model Checking for Distributed Real-Time Systems. [Citation Graph (0, 0)][DBLP]
    FME, 1993, pp:632-651 [Conf]
  13. Pao-Ann Hsiung, Farn Wang
    User-Friendly Verification. [Citation Graph (0, 0)][DBLP]
    FORTE, 1999, pp:279-294 [Conf]
  14. Farn Wang
    Symbolic Verification of Complex Real-Time Systems with Clock-Restriction Diagram. [Citation Graph (0, 0)][DBLP]
    FORTE, 2001, pp:235-250 [Conf]
  15. Farn Wang, Geng-Dian Hwang, Fang Yu
    Numerical Coverage Estimation for the Symbolic Simulation of Real-Time Systems. [Citation Graph (0, 0)][DBLP]
    FORTE, 2003, pp:160-176 [Conf]
  16. Farn Wang, Karsten Schmidt
    Symmetric Symbolic Safety-Analysis of Concurrent Software with Pointer Data Structures. [Citation Graph (0, 0)][DBLP]
    FORTE, 2002, pp:50-64 [Conf]
  17. Farn Wang, Pao-Ann Hsiung
    Automatic Verification on the Large. [Citation Graph (0, 0)][DBLP]
    HASE, 1998, pp:134-141 [Conf]
  18. Farn Wang
    Symbolic Verification of Distributed Real-Time Systems with Complex Synchronizations. [Citation Graph (0, 0)][DBLP]
    ICFEM, 2005, pp:300-314 [Conf]
  19. Farn Wang, Aloysius K. Mok, E. Allen Emerson
    Formal Specification of Ssynchronous Distributed Real-Time Systems by APTL. [Citation Graph (0, 0)][DBLP]
    ICSE, 1992, pp:188-198 [Conf]
  20. Farn Wang
    A Temporal Logic for Real-Time Partial-Ordering with Named Transactions. [Citation Graph (0, 0)][DBLP]
    LATIN, 1995, pp:494-508 [Conf]
  21. Farn Wang
    Timing Behavior Analysis for Real-Time Systems [Citation Graph (0, 0)][DBLP]
    LICS, 1995, pp:112-122 [Conf]
  22. Tei-Wei Kuo, Doug Locke, Farn Wang
    Error Propagation Analysis of Real-Time Data Intensive Applications. [Citation Graph (0, 0)][DBLP]
    IEEE Real Time Technology and Applications Symposium, 1997, pp:166-171 [Conf]
  23. Farn Wang
    Scalable compositional reachability analysis of real-time concurrent systems. [Citation Graph (0, 0)][DBLP]
    IEEE Real Time Technology and Applications Symposium, 1996, pp:182-191 [Conf]
  24. Pao-Ann Hsiung, Farn Wang
    A State Graph Manipulator Tool for Real-Time System Specification and Verification. [Citation Graph (0, 0)][DBLP]
    RTCSA, 1998, pp:181-188 [Conf]
  25. Pao-Ann Hsiung, Farn Wang, Ruey-Cheng Chen
    On the verification of Wireless Transaction Protocol using SGM and RED. [Citation Graph (0, 0)][DBLP]
    RTCSA, 2000, pp:379-383 [Conf]
  26. Pao-Ann Hsiung, Farn Wang, Yue-Sun Kuo
    Verification of Concurrent Client-Server Real-Time Scheduling Systems. [Citation Graph (0, 0)][DBLP]
    RTCSA, 1999, pp:228-235 [Conf]
  27. Tei-Wei Kuo, Shao-Juen Ho, Chih-Hung Wei, Farn Wang
    PASS: a prototyping, analysis, simulation, and synthesis environment for real-time systems. [Citation Graph (0, 0)][DBLP]
    RTCSA, 1997, pp:260-267 [Conf]
  28. Farn Wang
    Scalable compositional verification of high-level real-time concurrent systems from 107 to 1085 states. [Citation Graph (0, 0)][DBLP]
    RTCSA, 1996, pp:106-0 [Conf]
  29. Farn Wang, Geng-Dian Huang, Fang Yu
    Symbolic Simulation of Real-Time Concurrent Systems. [Citation Graph (0, 0)][DBLP]
    RTCSA, 2003, pp:595-617 [Conf]
  30. Farn Wang, Fang Yu
    OVL Assertion-Checking of Embedded Software with Dense-Time Semantics. [Citation Graph (0, 0)][DBLP]
    RTCSA, 2003, pp:254-278 [Conf]
  31. Jin Yang, Aloysius K. Mok, Farn Wang
    Symbolic Model Checking for Event-Driven Real-Time Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Real-Time Systems Symposium, 1993, pp:23-33 [Conf]
  32. Farn Wang, Hsu-Chun Yen
    Parametric Optimization of Open Real-Time Systems. [Citation Graph (0, 0)][DBLP]
    SAS, 2001, pp:299-318 [Conf]
  33. Farn Wang, Rong-Shiung Wu, Geng-Dian Huang
    Verifying Timed and Linear Hybrid Rule-Systems with RED. [Citation Graph (0, 0)][DBLP]
    SEKE, 2005, pp:448-454 [Conf]
  34. Pao-Ann Hsiung, Farn Wang, Yue-Sun Kuo
    Scheduling System Verification. [Citation Graph (0, 0)][DBLP]
    TACAS, 1999, pp:19-33 [Conf]
  35. Farn Wang
    Efficient Data Structure for Fully Symbolic Verification of Real-Time Software Systems. [Citation Graph (0, 0)][DBLP]
    TACAS, 2000, pp:157-171 [Conf]
  36. Farn Wang
    Efficient Verification of Timed Automata with BDD-Like Data-Structures. [Citation Graph (0, 0)][DBLP]
    VMCAI, 2003, pp:189-205 [Conf]
  37. Farn Wang, Geng-Dian Hwang, Fang Yu
    TCTL Inevitability Analysis of Dense-Time Systems. [Citation Graph (0, 0)][DBLP]
    CIAA, 2003, pp:176-187 [Conf]
  38. Farn Wang, Hsu-Chun Yen
    Timing Parameter Characterization of Real-Time Systems. [Citation Graph (0, 0)][DBLP]
    CIAA, 2003, pp:23-34 [Conf]
  39. Farn Wang
    Symbolic Parametric Analysis of Embedded Systems with BDD-like Data-Structures [Citation Graph (0, 0)][DBLP]
    CoRR, 2003, v:0, n:, pp:- [Journal]
  40. Farn Wang, Geng-Dian Hwang, Fang Yu
    TCTL Inevitability Analysis of Dense-time Systems [Citation Graph (0, 0)][DBLP]
    CoRR, 2003, v:0, n:, pp:- [Journal]
  41. Farn Wang, Geng-Dian Hwang, Fang Yu
    Numerical Coverage Estimation for the Symbolic Simulation of Real-Time Systems [Citation Graph (0, 0)][DBLP]
    CoRR, 2003, v:0, n:, pp:- [Journal]
  42. Farn Wang
    Parametric Analysis of Computer Systems. [Citation Graph (0, 0)][DBLP]
    Formal Methods in System Design, 2000, v:17, n:1, pp:39-60 [Journal]
  43. Farn Wang
    Parametric Timing Analysis for Real-Time Systems. [Citation Graph (0, 0)][DBLP]
    Inf. Comput., 1996, v:130, n:2, pp:131-150 [Journal]
  44. Farn Wang
    Inductive Composition Of Numbers With Maximum, Minimum, And Addition: A New Theory for Program Execution-Time Analysis. [Citation Graph (0, 0)][DBLP]
    Int. J. Found. Comput. Sci., 2004, v:15, n:6, pp:865-892 [Journal]
  45. Farn Wang
    Preface. [Citation Graph (0, 0)][DBLP]
    Int. J. Found. Comput. Sci., 2006, v:17, n:4, pp:731-732 [Journal]
  46. Farn Wang, Chia-Tien Dan Lo
    Procedure-Level Verification of Real-time Concurrent Systems. [Citation Graph (0, 0)][DBLP]
    Real-Time Systems, 1999, v:16, n:1, pp:81-114 [Journal]
  47. Farn Wang
    Efficient verification of timed automata with BDD-like data structures. [Citation Graph (0, 0)][DBLP]
    STTT, 2004, v:6, n:1, pp:77-97 [Journal]
  48. Farn Wang, Pao-Ann Hsiung
    Efficient and User-Friendly Verification. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2002, v:51, n:1, pp:61-83 [Journal]
  49. Farn Wang
    A Temporal Logic for Real-Time Partial Ordering with Named Transactions. [Citation Graph (0, 0)][DBLP]
    Theor. Comput. Sci., 1997, v:181, n:1, pp:195-225 [Journal]
  50. Jin Yang, Aloysius K. Mok, Farn Wang
    Symboloc Model Checking for Event-Driven Real-Time Systems. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Program. Lang. Syst., 1997, v:19, n:2, pp:386-412 [Journal]
  51. Farn Wang, Aloysius K. Mok, E. Allen Emerson
    Distributed Real-Time System Specification and Verification in APTL. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Softw. Eng. Methodol., 1993, v:2, n:4, pp:346-378 [Journal]
  52. Farn Wang
    Symbolic Parametric Safety Analysis of Linear Hybrid Systems with BDD-Like Data-Structures. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Software Eng., 2005, v:31, n:1, pp:38-51 [Journal]
  53. Farn Wang, Karsten Schmidt, Fang Yu, Geng-Dian Huang, Bow-Yaw Wang
    BDD-Based Safety-Analysis of Concurrent Software with Pointer Data Structures Using Graph Automorphism Symmetry Reduction. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Software Eng., 2004, v:30, n:6, pp:403-417 [Journal]
  54. Farn Wang, Geng-Dian Huang, Fang Yu
    TCTL Inevitability Analysis of Dense-Time Systems: From Theory to Engineering. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Software Eng., 2006, v:32, n:7, pp:510-526 [Journal]
  55. Farn Wang
    Symbolic Simulation-Checking of Dense-Time Automata. [Citation Graph (0, 0)][DBLP]
    FORMATS, 2007, pp:352-368 [Conf]
  56. Farn Wang
    Symbolic Simulation-Checking of Dense-Time Systems [Citation Graph (0, 0)][DBLP]
    CoRR, 2006, v:0, n:, pp:- [Journal]
  57. Farn Wang
    Under-approximation of the Greatest Fixpoint in Real-Time System Verification [Citation Graph (0, 0)][DBLP]
    CoRR, 2005, v:0, n:, pp:- [Journal]
  58. Farn Wang
    Under-approximation of the Greatest Fixpoints in Real-Time System Verification [Citation Graph (0, 0)][DBLP]
    CoRR, 2005, v:0, n:, pp:- [Journal]

  59. Time-Progress Evaluation for Dense-Time Automata with Concave Path Conditions. [Citation Graph (, )][DBLP]


  60. LTL Model Checking for Recursive Programs. [Citation Graph (, )][DBLP]


  61. Real-time Automated MDRO Surveillance System. [Citation Graph (, )][DBLP]


  62. Program Repair Suggestions from Graphical State-Transition Specifications. [Citation Graph (, )][DBLP]


  63. Symbolic Branching Bisimulation-Checking of Dense-Time Systems in an Environment. [Citation Graph (, )][DBLP]


  64. REDLIB for the Formal Verification of Embedded Systems. [Citation Graph (, )][DBLP]


  65. Test automation for kernel code and disk arrays with virtual devices. [Citation Graph (, )][DBLP]


  66. Test Plan Generation for Concurrent Real-Time Systems Based on Zone Coverage Analysis. [Citation Graph (, )][DBLP]


  67. Efficient Model-Checking of Dense-Time Systems with Time-Convexity Analysis. [Citation Graph (, )][DBLP]


  68. Simulation-Checking of Real-Time Systems with Fairness Assumptions [Citation Graph (, )][DBLP]


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