Search the dblp DataBase
C. Petit: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]
Publications of Author
- Richard Egli, C. Petit, Neil F. Stewart
Moving coordinate frames for representation and visualization in four dimensions. [Citation Graph (0, 0)][DBLP]
Computers & Graphics, 1996, v:20, n:6, pp:905-919 [Journal] - D. Zander, C. Petit, F. Saigné, A. Meinertzhagen
High field stress at and above room temperature in 2.3 nm thick oxides. [Citation Graph (0, 0)][DBLP]
Microelectronics Reliability, 2001, v:41, n:7, pp:1023-1026 [Journal] - D. Zander, F. Saigné, A. Meinertzhagen, C. Petit
Contribution of oxide traps on defect creation and LVSILC conduction in ultra thin gate oxide devices. [Citation Graph (0, 0)][DBLP]
Microelectronics Reliability, 2003, v:43, n:9-11, pp:1489-1493 [Journal] - M. Fadlallah, C. Petit, A. Meinertzhagen, G. Ghibaudo, M. Bidaud, O. Simonetti, F. Guyader
Influence of nitradation in ultra-thin oxide on the gate current degradation of N and PMOS devices. [Citation Graph (0, 0)][DBLP]
Microelectronics Reliability, 2003, v:43, n:9-11, pp:1433-1438 [Journal] - C. Petit, A. Meinertzhagen, D. Zander, O. Simonetti, M. Fadlallah, T. Maurel
Low voltage SILC and P- and N-MOSFET gate oxide reliability. [Citation Graph (0, 0)][DBLP]
Microelectronics Reliability, 2005, v:45, n:3-4, pp:479-485 [Journal] - C. Petit, D. Zander
Low voltage stress induced leakage current and time to breakdown in ultra-thin (1.2-2.3nm) oxides. [Citation Graph (0, 0)][DBLP]
Microelectronics Reliability, 2007, v:47, n:2-3, pp:401-408 [Journal]
Search in 0.001secs, Finished in 0.001secs
| NOTICE1 |
|---|
| System may not be available sometimes or not working properly, since it is still in development with continuous upgrades |
| NOTICE2 |
|---|
| The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP |
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002