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Lee D. Coraor: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Marc Bumble, Lee D. Coraor, Lily Elefteriadou
    Exploring CORSIM Runtime Characteristics: Profiling a Traffic Simulator. [Citation Graph (0, 0)][DBLP]
    Annual Simulation Symposium, 2000, pp:139-0 [Conf]
  2. Tarak Gandhi, Mau-Tsuen Yang, Rangachar Kasturi, Octavia I. Camps, Lee D. Coraor, Jeffrey McCandless
    Detection of Obstacles in the Flight Path of an Aircraft. [Citation Graph (0, 0)][DBLP]
    CVPR, 2000, pp:2304-2311 [Conf]
  3. Lizy Kurian John, Vinod Reddy, Paul T. Hulina, Lee D. Coraor
    A comparative evaluation of software techniques to hide memory latency. [Citation Graph (0, 0)][DBLP]
    HICSS (1), 1995, pp:229- [Conf]
  4. Lizy Kurian John, Vinod Reddy, Paul T. Hulina, Lee D. Coraor
    Program Balance and Its Impact on High Performance RISC Architectures. [Citation Graph (0, 0)][DBLP]
    HPCA, 1995, pp:370-379 [Conf]
  5. David L. Landis, Paul T. Hulina, Scott Deno, Luke Roth, Lee D. Coraor
    Evaluation of Computing in Memory Architectures for Digital Image Processing Applications. [Citation Graph (0, 0)][DBLP]
    ICCD, 1999, pp:146-151 [Conf]
  6. Ali Berrached, Paul T. Hulina, Lee D. Coraor
    Structured Data Access Mechanisms for a Decoupled Computer Architecture. [Citation Graph (0, 0)][DBLP]
    ICPP, 1994, pp:285-289 [Conf]
  7. Lee D. Coraor, Paul T. Hulina
    A Reconfigurable Multiprocessor. [Citation Graph (0, 0)][DBLP]
    ICPP, 1985, pp:649-651 [Conf]
  8. Paul T. Hulina, Lee D. Coraor
    A Hardware Memory Mapping Unit for Efficient Address Computation. [Citation Graph (0, 0)][DBLP]
    ICPP, 1987, pp:340-343 [Conf]
  9. Paul T. Hulina, Lee D. Coraor, Shih-Wei Sun
    Performance Analysis of an Address Generation Coprocessor. [Citation Graph (0, 0)][DBLP]
    ICPP (1), 1991, pp:136-143 [Conf]
  10. Lizy Kurian John, Bermjae Choi, Paul T. Hulina, Lee D. Coraor
    Module Partitioning and Interlaced Data Placement Schemes to Reduce Conflicts in Interleaved Memories. [Citation Graph (0, 0)][DBLP]
    ICPP (1), 1994, pp:212-219 [Conf]
  11. Marc Bumble, Lee D. Coraor
    Implementing Parallelism in Random Discrete Event-Driven Simulation. [Citation Graph (0, 0)][DBLP]
    IPPS/SPDP Workshops, 1998, pp:418-427 [Conf]
  12. Lizy Kurian John, Paul T. Hulina, Lee D. Coraor
    Memory Latency Effects in Decoupled Architectures With a Single Data Memory Module. [Citation Graph (0, 0)][DBLP]
    ISCA, 1992, pp:236-245 [Conf]
  13. Lizy Kurian John, Paul T. Hulina, Lee D. Coraor, Dhamir N. Mannai
    Classification and Performance Evaluation of Instruction Buffering Techniques. [Citation Graph (0, 0)][DBLP]
    ISCA, 1991, pp:150-159 [Conf]
  14. Luke Roth, Lee D. Coraor, David L. Landis, Paul T. Hulina, Scott Deno
    Computing in Memory Architectures for Digital Image Processing. [Citation Graph (0, 0)][DBLP]
    MTDT, 1999, pp:8-15 [Conf]
  15. David L. Landis, Praveen Guddeti, Paul T. Hulina, Lee D. Coraor
    Language-Based Rapid Prototyping Methods for Legacy System Re-Engineering and Re-Use. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 1999, pp:52-0 [Conf]
  16. Marc Bumble, Lee D. Coraor
    Architecture for a Non-deterministic Simulation Machine. [Citation Graph (0, 0)][DBLP]
    Winter Simulation Conference, 1998, pp:1599-1606 [Conf]
  17. Marc Bumble, Lee D. Coraor
    A global synchronization network for a non-deterministic simulation architecture. [Citation Graph (0, 0)][DBLP]
    Winter Simulation Conference, 1999, pp:1460-1469 [Conf]
  18. Paul T. Hulina, Lee D. Coraor
    Coprocessor architectures for efficient address computation and memory accessing. [Citation Graph (0, 0)][DBLP]
    Comput. Syst. Sci. Eng., 1990, v:5, n:3, pp:137-146 [Journal]
  19. Mau-Tsuen Yang, Tarak Gandhi, Rangachar Kasturi, Lee D. Coraor, Octavia I. Camps, Jeffrey McCandless
    Real-Time Implementation of Obstacle Detection Algorithms on a Datacube MaxPCI Architecture. [Citation Graph (0, 0)][DBLP]
    Real-Time Imaging, 2002, v:8, n:2, pp:157-172 [Journal]
  20. Lee D. Coraor, Paul T. Hulina, Orlando A. Morean
    A General Model for Memory-Based Finite-State Machines. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1987, v:36, n:2, pp:175-184 [Journal]
  21. Lizy Kurian John, Paul T. Hulina, Lee D. Coraor
    Memory Latency Effects in Decoupled Architectures. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1994, v:43, n:10, pp:1129-1139 [Journal]
  22. Tarak Gandhi, Mau-Tsuen Yang, Rangachar Kasturi, Octavia I. Camps, Lee D. Coraor, Jeffrey McCandless
    Performance characterization of the dynamic programming obstacle detection algorithm. [Citation Graph (0, 0)][DBLP]
    IEEE Transactions on Image Processing, 2006, v:15, n:5, pp:1202-1214 [Journal]

  23. Improving Cache Performance in a Multiprocessor Environment. [Citation Graph (, )][DBLP]


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