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Yeong-Dae Kim: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Jung-Ug Kim, Yeong-Dae Kim
    Simulated annealing and genetic algorithms for scheduling products with multi-level product structure. [Citation Graph (0, 0)][DBLP]
    Computers & OR, 1996, v:23, n:9, pp:857-868 [Journal]
  2. Yeong-Dae Kim
    A new branch and bound algorithm for minimizing mean tardiness in two-machine flowshops. [Citation Graph (0, 0)][DBLP]
    Computers & OR, 1993, v:20, n:4, pp:391-401 [Journal]
  3. Yeong-Dae Kim
    A backward approach in list scheduling algorithms for multi-machine tardiness problems. [Citation Graph (0, 0)][DBLP]
    Computers & OR, 1995, v:22, n:3, pp:307-319 [Journal]
  4. Moon-Won Park, Yeong-Dae Kim
    A systematic procedure for setting parameters in simulated annealing algorithms. [Citation Graph (0, 0)][DBLP]
    Computers & OR, 1998, v:25, n:3, pp:207-217 [Journal]
  5. Jae-Gon Kim, Yeong-Dae Kim
    A linear programming-based algorithm for floorplanning in VLSI design. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2003, v:22, n:5, pp:584-592 [Journal]
  6. Sang-Oh Shim, Yeong-Dae Kim
    Scheduling on parallel identical machines to minimize total tardiness. [Citation Graph (0, 0)][DBLP]
    European Journal of Operational Research, 2007, v:177, n:1, pp:135-146 [Journal]
  7. Seong-Hoon Choi, Yeong-Dae Kim
    Reallocation of paths of ABR services in a multistage interconnection network (MIN)-type ATM switch network. [Citation Graph (0, 0)][DBLP]
    European Journal of Operational Research, 2004, v:159, n:1, pp:207-218 [Journal]

  8. Multi-product lot merging/splitting algorithms for a semiconductor wafer fabrication. [Citation Graph (, )][DBLP]


  9. Heuristics for search sequencing under time-dependent probabilities of existence. [Citation Graph (, )][DBLP]


  10. A branch and bound algorithm for an identical parallel machine scheduling problem with a job splitting property. [Citation Graph (, )][DBLP]


  11. Minimizing makespan on an m-machine re-entrant flowshop. [Citation Graph (, )][DBLP]


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