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Publications of Author

1. Bin Li, Liyi Xiao, Yizheng Ye, Guoyong Huang
   CLUGGS and CLUCR-Two Matrix Solution Methods for General Circuit Simulation. [Citation Graph (0, 0)][DBLP]
   Annual Simulation Symposium, 2001, pp:78-0 [Conf]
   
2. Liyi Xiao, Bin Li, Yizheng Ye, Guoyong Huang, JinJun Guo, Peng Zhang
   A mixed-signal simulator for VHDL-AMS. [Citation Graph (0, 0)][DBLP]
   ASP-DAC, 2001, pp:287-292 [Conf]
   
3. Zulan Huang, Yizheng Ye, Zhigang Mao
   A New Algorithm for Retiming-Based Partial Scan. [Citation Graph (0, 0)][DBLP]
   Asian Test Symposium, 1999, pp:327-0 [Conf]
   
4. Yong-sheng Wang, Jin-xiang Wang, Feng-chang Lai, Yizheng Ye
   Optimal Schemes for ADC BIST Based on Histogram. [Citation Graph (0, 0)][DBLP]
   Asian Test Symposium, 2005, pp:52-57 [Conf]
   
5. Yong-sheng Wang, Liyi Xiao, Mingyan Yu, Jin-xiang Wang, Yizheng Ye
   A Test Architecture for System-on-a-Chip. [Citation Graph (0, 0)][DBLP]
   Asian Test Symposium, 2003, pp:506- [Conf]
   
6. Pingying Zeng, Zhigang Mao, Yizheng Ye, Yuliang Deng
   Test Pattern Generation for Column Compression Multiplier. [Citation Graph (0, 0)][DBLP]
   Asian Test Symposium, 1998, pp:500-503 [Conf]
   
7. Qingli Zhang, Jinxiang Wang, Yizheng Ye
   An energy-efficient temporal encoding circuit technique for on-chip high performance buses. [Citation Graph (0, 0)][DBLP]
   ACM Great Lakes Symposium on VLSI, 2006, pp:422-427 [Conf]
   
8. Bin Zhou, Yizheng Ye, Yong-sheng Wang
   Simultaneous reduction in test data volume and test time for TRC-reseeding. [Citation Graph (0, 0)][DBLP]
   ACM Great Lakes Symposium on VLSI, 2007, pp:49-54 [Conf]
   
9. Zhiqiang Gao, Jianguo Ma, Yizheng Ye, Mingyan Yu
   Large tuning band range of high frequency filter for wireless applications. [Citation Graph (0, 0)][DBLP]
   ISCAS (1), 2005, pp:384-387 [Conf]
   
10. Jianwei Zhang, Yizheng Ye, Binda Liu
    A new mismatch-dependent low power technique with shadow match-line voltage-detecting scheme for CAMs. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2006, pp:135-138 [Conf]
    
11. Xuemei Zhao, Yizheng Ye
    Design and Realization of a Low Power Register File Using Energy Model. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2002, pp:268-277 [Conf]
    
12. Tong Zhou, Mingyan Yu, Yizheng Ye
    A Pipelined Switched-Current Chaotic System for the High-Speed Truly Random Number Generation in Crypto Processor. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2006, pp:216-221 [Conf]
    
13. Liu Songyan, Zhigang Mao, Yizheng Ye
    Implementation of Java Card Virtual Machine. [Citation Graph (0, 0)][DBLP]
    J. Comput. Sci. Technol., 2000, v:15, n:6, pp:591-596 [Journal]
    
14. Liyi Xiao, Yizheng Ye, Bin Li
    A New Synchronization Algorithm for VHDL-AMS Simulation. [Citation Graph (0, 0)][DBLP]
    J. Comput. Sci. Technol., 2002, v:17, n:1, pp:28-37 [Journal]
    
15. Zhiqiang Gao, Mingyan Yu, Yizheng Ye, Jianguo Ma
    A CMOS bandpass filter with wide-tuning range for wireless applications. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
    
16. Shengtian Sang, Xiaoming Li, Yizheng Ye
    Dependency driven partitioning objects generation for hardware/software partitioning. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
    
17. Guochi Huang, Tae-sung Kim, Byung-Sung Kim, Mingyan Yu, Yizheng Ye
    Post linearization of CMOS LNA using double cascade FETs. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
    
18. 
    A new low power test pattern generator using a variable-length ring counter. [Citation Graph (, )][DBLP]
    
    
19. 
    Delay and Energy Efficient Design of On-Chip Encoded Bus with Repeaters. [Citation Graph (, )][DBLP]
    
    
20. 
    Design of A Low Power High Entropy Chaos-Based Truly Random Number Generator. [Citation Graph (, )][DBLP]
    
    
21. 
    Low-Power Crosstalk Avoidance Encoding for On-Chip Data Buses. [Citation Graph (, )][DBLP]
    
    
22. 
    A Low-Power Technique Based on Charge Injection and Current-Saving Methods for Match-Line Sensing in Content-Addressable Memories. [Citation Graph (, )][DBLP]