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David B. Whalley :
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Frank Mueller , David B. Whalley Fast instruction cache analysis via static cache simulation. [Citation Graph (0, 0)][DBLP ] Annual Simulation Symposium, 1995, pp:105-114 [Conf ] Stephen Hines , David B. Whalley , Gary S. Tyson Adapting compilation techniques to enhance the packing of instructions into registers. [Citation Graph (0, 0)][DBLP ] CASES, 2006, pp:43-53 [Conf ] Gang-Ryung Uh , Yuhong Wang , David B. Whalley , Sanjay Jinturkar , Chris Burns , Vincent Cao Techniques for Effectively Exploiting a Zero Overhead Loop Buffer. [Citation Graph (0, 0)][DBLP ] CC, 2000, pp:157-172 [Conf ] Prasad Kulkarni , David B. Whalley , Gary S. Tyson , Jack W. Davidson Exhaustive Optimization Phase Order Space Exploration. [Citation Graph (0, 0)][DBLP ] CGO, 2006, pp:306-318 [Conf ] Prasad Kulkarni , David B. Whalley , Gary S. Tyson Evaluating Heuristic Optimization Phase Order Search Algorithms. [Citation Graph (0, 0)][DBLP ] CGO, 2007, pp:157-169 [Conf ] Stephen Hines , Prasad Kulkarni , David B. Whalley , Jack W. Davidson Using de-optimization to re-optimize code. [Citation Graph (0, 0)][DBLP ] EMSOFT, 2005, pp:114-123 [Conf ] William C. Kreahling , David B. Whalley , Mark W. Bailey , Xin Yuan , Gang-Ryung Uh , Robert van Engelen Branch Elimination via Multi-variable Condition Merging. [Citation Graph (0, 0)][DBLP ] Euro-Par, 2003, pp:261-270 [Conf ] Apan Qasem , David B. Whalley , Xin Yuan , Robert van Engelen Using a Swap Instruction to Coalesce Loads and Stores. [Citation Graph (0, 0)][DBLP ] Euro-Par, 2001, pp:235-240 [Conf ] R. Clint Whaley , David B. Whalley Tuning High Performance Kernels through Empirical Compilation. [Citation Graph (0, 0)][DBLP ] ICPP, 2005, pp:89-98 [Conf ] John M. Mellor-Crummey , Robert J. Fowler , David B. Whalley Tools for application-oriented performance tuning. [Citation Graph (0, 0)][DBLP ] ICS, 2001, pp:154-165 [Conf ] John M. Mellor-Crummey , David B. Whalley , Ken Kennedy Improving memory hierarchy performance for irregular applications. [Citation Graph (0, 0)][DBLP ] International Conference on Supercomputing, 1999, pp:425-433 [Conf ] Jack W. Davidson , David B. Whalley Reducing the Cost of Branches by Using Registers. [Citation Graph (0, 0)][DBLP ] ISCA, 1990, pp:182-191 [Conf ] Stephen Hines , Joshua Green , Gary S. Tyson , David B. Whalley Improving Program Efficiency by Packing Instructions into Registers. [Citation Graph (0, 0)][DBLP ] ISCA, 2005, pp:260-271 [Conf ] Jeonghun Cho , Yunheung Paek , David B. Whalley Efficient register and memory assignment for non-orthogonal architectures via graph coloring and MST algorithms. [Citation Graph (0, 0)][DBLP ] LCTES-SCOPES, 2002, pp:130-138 [Conf ] Lo Ko , David B. Whalley , Marion G. Harmon Supporting User-Friendly Analysis of Timing Constraints. [Citation Graph (0, 0)][DBLP ] Workshop on Languages, Compilers, & Tools for Real-Time Systems, 1995, pp:99-107 [Conf ] William C. Kreahling , Stephen Hines , David B. Whalley , Gary S. Tyson Reducing the cost of conditional transfers of control by using comparison specifications. [Citation Graph (0, 0)][DBLP ] LCTES, 2006, pp:64-71 [Conf ] Prasad Kulkarni , David B. Whalley , Gary S. Tyson , Jack W. Davidson In search of near-optimal optimization phase orderings. [Citation Graph (0, 0)][DBLP ] LCTES, 2006, pp:83-92 [Conf ] Prasad Kulkarni , Wankang Zhao , Hwashin Moon , Kyunghwan Cho , David B. Whalley , Jack W. Davidson , Mark W. Bailey , Yunheung Paek , Kyle Gallivan Finding effective optimization phase sequences. [Citation Graph (0, 0)][DBLP ] LCTES, 2003, pp:12-23 [Conf ] Robert van Engelen , David B. Whalley , Xin Yuan Automatic Validation of Code-Improving Transformations. [Citation Graph (0, 0)][DBLP ] LCTES, 2000, pp:206-210 [Conf ] Richard Gerber , Steven W. K. Tjiang , David B. Whalley , David Wilner , Michael Wolfe Appropriate Interfaces Between Design Tools, Languages, Compilers and Runtimes in Real-Time Systems (Panel). [Citation Graph (0, 0)][DBLP ] Workshop on Languages, Compilers, & Tools for Real-Time Systems, 1995, pp:124- [Conf ] Gang-Ryung Uh , Yuhong Wang , David B. Whalley , Sanjay Jinturkar , Chris Burns , Vincent Cao Effective Exploitation of a Zero Overhead Loop Buffer. [Citation Graph (0, 0)][DBLP ] Workshop on Languages, Compilers, and Tools for Embedded Systems, 1999, pp:10-19 [Conf ] Emilio Vivancos , Christopher A. Healy , Frank Mueller , David B. Whalley Parametric Timing Analysis. [Citation Graph (0, 0)][DBLP ] LCTES/OM, 2001, pp:88-93 [Conf ] Wankang Zhao , Baosheng Cai , David B. Whalley , Mark W. Bailey , Robert van Engelen , Xin Yuan , Jason Hiser , Jack W. Davidson , Kyle Gallivan , Douglas L. Jones VISTA: a system for interactive code improvement. [Citation Graph (0, 0)][DBLP ] LCTES-SCOPES, 2002, pp:155-164 [Conf ] Stephen Hines , Gary S. Tyson , David B. Whalley Reducing Instruction Fetch Cost by Packing Instructions into RegisterWindows. [Citation Graph (0, 0)][DBLP ] MICRO, 2005, pp:19-29 [Conf ] Frank Mueller , David B. Whalley , Marion G. Harmon Real-Time Debugging by Minimal Hardware Simulation. [Citation Graph (0, 0)][DBLP ] PEARL, 1994, pp:68-76 [Conf ] Mickey R. Boyd , David B. Whalley Isolation and Analysis of Optimization Errors. [Citation Graph (0, 0)][DBLP ] PLDI, 1993, pp:26-35 [Conf ] Prasad Kulkarni , Stephen Hines , Jason Hiser , David B. Whalley , Jack W. Davidson , Douglas L. Jones Fast searches for effective optimization phase sequences. [Citation Graph (0, 0)][DBLP ] PLDI, 2004, pp:171-182 [Conf ] Frank Mueller , David B. Whalley Avoiding Unconditional Jumps by Code Replication. [Citation Graph (0, 0)][DBLP ] PLDI, 1992, pp:322-330 [Conf ] Frank Mueller , David B. Whalley Avoiding Conditional Branches by Code Replication. [Citation Graph (0, 0)][DBLP ] PLDI, 1995, pp:56-66 [Conf ] Minghui Yang , Gang-Ryung Uh , David B. Whalley Improving Performance by Branch Reordering. [Citation Graph (0, 0)][DBLP ] PLDI, 1998, pp:130-141 [Conf ] Christopher A. Healy , Mikael Sjödin , Viresh Rustagi , David B. Whalley Bounding Loop Iterations for Timing Analysis. [Citation Graph (0, 0)][DBLP ] IEEE Real Time Technology and Applications Symposium, 1998, pp:12-21 [Conf ] Christopher A. Healy , David B. Whalley Tighter Timing Predictions by Automatic Detection and Exploitation of Value-Dependent Constraints. [Citation Graph (0, 0)][DBLP ] IEEE Real Time Technology and Applications Symposium, 1999, pp:79-88 [Conf ] Lo Ko , Christopher A. Healy , Emily Ratliff , Robert D. Arnold , David B. Whalley , Marion G. Harmon Supporting the specification and analysis of timing constraints. [Citation Graph (0, 0)][DBLP ] IEEE Real Time Technology and Applications Symposium, 1996, pp:170-0 [Conf ] Sibin Mohan , Frank Mueller , David B. Whalley , Christopher A. Healy Timing Analysis for Sensor Network Nodes of the Atmega Processor Family. [Citation Graph (0, 0)][DBLP ] IEEE Real-Time and Embedded Technology and Applications Symposium, 2005, pp:405-414 [Conf ] Randall T. White , Christopher A. Healy , David B. Whalley , Frank Mueller , Marion G. Harmon Timing Analysis for Data Caches and Set-Associative Caches. [Citation Graph (0, 0)][DBLP ] IEEE Real Time Technology and Applications Symposium, 1997, pp:192-202 [Conf ] Wankang Zhao , William C. Kreahling , David B. Whalley , Christopher A. Healy , Frank Mueller Improving WCET by Optimizing Worst-Case Paths. [Citation Graph (0, 0)][DBLP ] IEEE Real-Time and Embedded Technology and Applications Symposium, 2005, pp:138-147 [Conf ] Wankang Zhao , Prasad Kulkarni , David B. Whalley , Christopher A. Healy , Frank Mueller , Gang-Ryung Uh Tuning the WCET of Embedded Applications. [Citation Graph (0, 0)][DBLP ] IEEE Real-Time and Embedded Technology and Applications Symposium, 2004, pp:472-481 [Conf ] Robert D. Arnold , Frank Mueller , David B. Whalley , Marion G. Harmon Bounding Worst-Case Instruction Cache Performance. [Citation Graph (0, 0)][DBLP ] IEEE Real-Time Systems Symposium, 1994, pp:172-181 [Conf ] Marion G. Harmon , Theodore P. Baker , David B. Whalley A Retargetable Technique for Predicting Execution Time. [Citation Graph (0, 0)][DBLP ] IEEE Real-Time Systems Symposium, 1992, pp:68-77 [Conf ] Christopher A. Healy , David B. Whalley , Marion G. Harmon Integrating the Timing Analysis of Pipelining and Instruction Caching. [Citation Graph (0, 0)][DBLP ] IEEE Real-Time Systems Symposium, 1995, pp:288-297 [Conf ] Sibin Mohan , Frank Mueller , William Hawkins , Michael Root , Christopher A. Healy , David B. Whalley ParaScale: Exploiting Parametric Timing Analysis for Real-Time Schedulers and Dynamic Voltage Scaling. [Citation Graph (0, 0)][DBLP ] RTSS, 2005, pp:233-242 [Conf ] Wankang Zhao , David B. Whalley , Christopher A. Healy , Frank Mueller WCET Code Positioning. [Citation Graph (0, 0)][DBLP ] RTSS, 2004, pp:81-91 [Conf ] Robert van Engelen , David B. Whalley , Xin Yuan Validation of Code-Improving Transformations for Embedded Systems. [Citation Graph (0, 0)][DBLP ] SAC, 2003, pp:684-691 [Conf ] Jason Hiser , Jack W. Davidson , David B. Whalley Fast, accurate design space exploration of embedded systems memory configurations. [Citation Graph (0, 0)][DBLP ] SAC, 2007, pp:699-706 [Conf ] Gang-Ryung Uh , David B. Whalley Coalescing Conditional Branches into Efficient Indirect Jumps. [Citation Graph (0, 0)][DBLP ] SAS, 1997, pp:315-329 [Conf ] Frank Mueller , David B. Whalley Efficient On-the-fly Analysis of Program Behavior and Static Cache Simulation. [Citation Graph (0, 0)][DBLP ] SAS, 1994, pp:101-115 [Conf ] Jack W. Davidson , David B. Whalley Ease: An Environment for Architecture Study and Experimentation. [Citation Graph (0, 0)][DBLP ] SIGMETRICS, 1990, pp:259-260 [Conf ] John M. Mellor-Crummey , Robert J. Fowler , David B. Whalley On providing useful information for analyzing and tuning applications. [Citation Graph (0, 0)][DBLP ] SIGMETRICS/Performance, 2001, pp:332-333 [Conf ] David B. Whalley Fast Instruction Cache Performance Evaluation Using Compile-Time Analysis. [Citation Graph (0, 0)][DBLP ] SIGMETRICS, 1992, pp:13-22 [Conf ] Reinhard Wilhelm , Jakob Engblom , Stephan Thesing , David B. Whalley Industrial Requirements for WCET Tools - Answers to the ARTIST Questionnaire. [Citation Graph (0, 0)][DBLP ] WCET, 2003, pp:39-43 [Conf ] John M. Mellor-Crummey , David B. Whalley , Ken Kennedy Improving Memory Hierarchy Performance for Irregular Applications Using Data and Computation Reorderings. [Citation Graph (0, 0)][DBLP ] International Journal of Parallel Programming, 2001, v:29, n:3, pp:217-247 [Journal ] Mickey R. Boyd , David B. Whalley Graphical visualization of compiler optimizations. [Citation Graph (0, 0)][DBLP ] J. Prog. Lang., 1995, v:3, n:2, pp:- [Journal ] Marion G. Harmon , Theodore P. Baker , David B. Whalley A Retargetable Technique for Predicting Execution Time of Code Segments. [Citation Graph (0, 0)][DBLP ] Real-Time Systems, 1994, v:7, n:2, pp:159-182 [Journal ] Christopher A. Healy , Mikael Sjödin , Viresh Rustagi , David B. Whalley , Robert van Engelen Supporting Timing Analysis by Automatic Bounding of Loop Iterations. [Citation Graph (0, 0)][DBLP ] Real-Time Systems, 2000, v:18, n:2/3, pp:129-156 [Journal ] Randall T. White , Frank Mueller , Christopher A. Healy , David B. Whalley , Marion G. Harmon Timing Analysis for Data and Wrap-Around Fill Caches. [Citation Graph (0, 0)][DBLP ] Real-Time Systems, 1999, v:17, n:2-3, pp:209-233 [Journal ] Wankang Zhao , William C. Kreahling , David B. Whalley , Christopher A. Healy , Frank Mueller Improving WCET by applying worst-case path optimizations. [Citation Graph (0, 0)][DBLP ] Real-Time Systems, 2006, v:34, n:2, pp:129-152 [Journal ] Robert van Engelen , David B. Whalley , Xin Yuan Automatic validation of code-improving transformations on low-level program representations. [Citation Graph (0, 0)][DBLP ] Sci. Comput. Program., 2004, v:52, n:, pp:257-280 [Journal ] Jack W. Davidson , David B. Whalley Quick Compilers Using Peephole Optimization. [Citation Graph (0, 0)][DBLP ] Softw., Pract. Exper., 1989, v:19, n:1, pp:79-97 [Journal ] Jack W. Davidson , David B. Whalley Methods for Saving and Restoring Register Values across Function Calls. [Citation Graph (0, 0)][DBLP ] Softw., Pract. Exper., 1991, v:21, n:2, pp:149-165 [Journal ] Lo Ko , Naghan Al-Yaqoubi , Christopher A. Healy , Emily Ratliff , Robert D. Arnold , David B. Whalley , Marion G. Harmon Timing Constraint Specification and Analysis. [Citation Graph (0, 0)][DBLP ] Softw., Pract. Exper., 1999, v:29, n:1, pp:77-98 [Journal ] William C. Kreahling , David B. Whalley , Mark W. Bailey , Xin Yuan , Gang-Ryung Uh , Robert van Engelen Branch elimination by condition merging. [Citation Graph (0, 0)][DBLP ] Softw., Pract. Exper., 2005, v:35, n:1, pp:51-74 [Journal ] Gang-Ryung Uh , Yuhong Wang , David B. Whalley , Sanjay Jinturkar , Yunheung Paek , Vincent Cao , Chris Burns Compiler transformations for effectively exploiting a zero overhead loop buffer. [Citation Graph (0, 0)][DBLP ] Softw., Pract. Exper., 2005, v:35, n:4, pp:393-412 [Journal ] Gang-Ryung Uh , David B. Whalley Effectively Exploiting Indirect Jumps. [Citation Graph (0, 0)][DBLP ] Softw., Pract. Exper., 1999, v:29, n:12, pp:1061-1101 [Journal ] David B. Whalley Techniques for Fast Instruction Cache Performance Evaluation. [Citation Graph (0, 0)][DBLP ] Softw., Pract. Exper., 1993, v:23, n:1, pp:95-118 [Journal ] Prasad Kulkarni , Stephen Hines , David B. Whalley , Jason Hiser , Jack W. Davidson , Douglas L. Jones Fast and efficient searches for effective optimization-phase sequences. [Citation Graph (0, 0)][DBLP ] TACO, 2005, v:2, n:2, pp:165-198 [Journal ] Wankang Zhao , David B. Whalley , Christopher A. Healy , Frank Mueller Improving WCET by applying a WC code-positioning optimization. [Citation Graph (0, 0)][DBLP ] TACO, 2005, v:2, n:4, pp:335-365 [Journal ] Jack W. Davidson , John R. Rabung , David B. Whalley Relating Static and Dynamic Machine Code Measurements. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1992, v:41, n:4, pp:444-454 [Journal ] Christopher A. Healy , Robert D. Arnold , Frank Mueller , David B. Whalley , Marion G. Harmon Bounding Pipeline and Instruction Cache Performance. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1999, v:48, n:1, pp:53-70 [Journal ] David B. Whalley Guest Editorial. [Citation Graph (0, 0)][DBLP ] ACM Trans. Embedded Comput. Syst., 2007, v:6, n:1, pp:- [Journal ] Prasad Kulkarni , Wankang Zhao , Stephen Hines , David B. Whalley , Xin Yuan , Robert van Engelen , Kyle Gallivan , Jason Hiser , Jack W. Davidson , Baosheng Cai , Mark W. Bailey , Hwashin Moon , Kyunghwan Cho , Yunheung Paek VISTA: VPO interactive system for tuning applications. [Citation Graph (0, 0)][DBLP ] ACM Trans. Embedded Comput. Syst., 2006, v:5, n:4, pp:819-863 [Journal ] Jeonghun Cho , Yunheung Paek , David B. Whalley Fast memory bank assignment for fixed-point digital signal processors. [Citation Graph (0, 0)][DBLP ] ACM Trans. Design Autom. Electr. Syst., 2004, v:9, n:1, pp:52-74 [Journal ] David B. Whalley Automatic Isolation of Compiler Errors. [Citation Graph (0, 0)][DBLP ] ACM Trans. Program. Lang. Syst., 1994, v:16, n:5, pp:1648-1659 [Journal ] Minghui Yang , Gang-Ryung Uh , David B. Whalley Efficient and effective branch reordering using profile data. [Citation Graph (0, 0)][DBLP ] ACM Trans. Program. Lang. Syst., 2002, v:24, n:6, pp:667-697 [Journal ] Christopher A. Healy , David B. Whalley Automatic Detection and Exploitation of Branch Constraints for Timing Analysis. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Software Eng., 2002, v:28, n:8, pp:763-781 [Journal ] Chris Zimmer , Stephen Roderick Hines , Prasad Kulkarni , Gary S. Tyson , David B. Whalley Facilitating compiler optimizations through the dynamic mapping of alternate register structures. [Citation Graph (0, 0)][DBLP ] CASES, 2007, pp:165-169 [Conf ] Joel Coffman , Christopher A. Healy , Frank Mueller , David B. Whalley Generalizing parametric timing analysis. [Citation Graph (0, 0)][DBLP ] LCTES, 2007, pp:152-154 [Conf ] Stephen Roderick Hines , Gary S. Tyson , David B. Whalley Addressing instruction fetch bottlenecks by using an instruction register file. [Citation Graph (0, 0)][DBLP ] LCTES, 2007, pp:165-174 [Conf ] Enhancing the effectiveness of utilizing an instruction register file. [Citation Graph (, )][DBLP ] Guaranteeing instruction fetch behavior with a lookahead instruction fetch engine (LIFE). [Citation Graph (, )][DBLP ] Improving both the performance benefits and speed of optimization phase sequence searches. [Citation Graph (, )][DBLP ] Guaranteeing Hits to Improve the Efficiency of a Small Instruction Cache. [Citation Graph (, )][DBLP ] Search in 0.004secs, Finished in 0.459secs