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Dan Page:
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Publications of Author
- Robert Granger, Andrew J. Holt, Dan Page, Nigel P. Smart, Frederik Vercauteren
Function Field Sieve in Characteristic Three. [Citation Graph (0, 0)][DBLP] ANTS, 2004, pp:223-234 [Conf]
- Robert Granger, Dan Page, Martijn Stam
A Comparison of CEILIDH and XTR. [Citation Graph (0, 0)][DBLP] ANTS, 2004, pp:235-249 [Conf]
- Robert Granger, Dan Page, Nigel P. Smart
High Security Pairing-Based Cryptography Revisited. [Citation Graph (0, 0)][DBLP] ANTS, 2006, pp:480-494 [Conf]
- James Irwin, David May, Henk L. Muller, Dan Page
Predictable Instruction Caching for Media Processors. [Citation Graph (0, 0)][DBLP] ASAP, 2002, pp:141-150 [Conf]
- James Irwin, Dan Page
Using Media Processors for Low-Memory AES Implementation. [Citation Graph (0, 0)][DBLP] ASAP, 2003, pp:144-154 [Conf]
- James Irwin, Dan Page, Nigel P. Smart
Instruction Stream Mutation for Non-Deterministic Processors. [Citation Graph (0, 0)][DBLP] ASAP, 2002, pp:286-295 [Conf]
- Peter J. Leadbitter, Dan Page, Nigel P. Smart
Attacking DSA Under a Repeated Bits Assumption. [Citation Graph (0, 0)][DBLP] CHES, 2004, pp:428-440 [Conf]
- Philipp Grabher, Dan Page
Hardware Acceleration of the Tate Pairing in Characteristic Three. [Citation Graph (0, 0)][DBLP] CHES, 2005, pp:398-411 [Conf]
- Dan Page, Nigel P. Smart
Hardware Implementation of Finite Fields of Characteristic Three. [Citation Graph (0, 0)][DBLP] CHES, 2002, pp:529-539 [Conf]
- Marten van Dijk, Robert Granger, Dan Page, Karl Rubin, Alice Silverberg, Martijn Stam, David P. Woodruff
Practical Cryptography in High Dimensional Tori. [Citation Graph (0, 0)][DBLP] EUROCRYPT, 2005, pp:234-250 [Conf]
- Dan Page, Jamil Kawa, Charles Chiang
DFM: swimming upstream. [Citation Graph (0, 0)][DBLP] ACM Great Lakes Symposium on VLSI, 2006, pp:1- [Conf]
- David May, Dan Page, James Irwin, Henk L. Muller
Microcaches. [Citation Graph (0, 0)][DBLP] HiPC, 1999, pp:21-27 [Conf]
- Manuel Barbosa, Dan Page
On the Automatic Construction of Indistinguishable Operations. [Citation Graph (0, 0)][DBLP] IMA Int. Conf., 2005, pp:233-247 [Conf]
- Dan Page, Martijn Stam
On XTR and Side-Channel Analysis. [Citation Graph (0, 0)][DBLP] Selected Areas in Cryptography, 2004, pp:54-68 [Conf]
- Henk L. Muller, Dan Page, James Irwin, David May
Caches with Compositional Performance. [Citation Graph (0, 0)][DBLP] Embedded Processor Design Challenges, 2002, pp:242-259 [Conf]
- Arjen K. Lenstra, Daniel Page, Martijn Stam
Discrete Logarithm Variants of VSH. [Citation Graph (0, 0)][DBLP] VIETCRYPT, 2006, pp:229-242 [Conf]
- Robert Granger, Dan Page, Martijn Stam
Hardware and Software Normal Basis Arithmetic for Pairing-Based Cryptography in Characteristic Three. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 2005, v:54, n:7, pp:852-860 [Journal]
- Dan Page, Nigel P. Smart
Parallel Cryptographic Arithmetic Using a Redundant Montgomery Representation. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 2004, v:53, n:11, pp:1474-1482 [Journal]
- Dan Page, Frederik Vercauteren
A Fault Attack on Pairing-Based Cryptography. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 2006, v:55, n:9, pp:1075-1080 [Journal]
- Peter J. Leadbitter, Dan Page, Nigel P. Smart
Nondeterministic Multithreading. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 2007, v:56, n:7, pp:992-998 [Journal]
- Manuel Barbosa, A. Moss, Dan Page
Compiler Assisted Elliptic Curve Cryptography. [Citation Graph (0, 0)][DBLP] OTM Conferences (2), 2007, pp:1785-1802 [Conf]
- Tobias Vejda, Dan Page, Johann Großschädl
Instruction Set Extensions for Pairing-Based Cryptography. [Citation Graph (0, 0)][DBLP] Pairing, 2007, pp:208-224 [Conf]
On the Design and Implementation of an Efficient DAA Scheme. [Citation Graph (, )][DBLP]
Non-deterministic processors: FPGA-based analysis of area, performance and security. [Citation Graph (, )][DBLP]
Light-Weight Instruction Set Extensions for Bit-Sliced Cryptography. [Citation Graph (, )][DBLP]
Hardware/Software Co-design of Public-Key Cryptography for SSL Protocol Execution in Embedded Systems. [Citation Graph (, )][DBLP]
Side-Channel Analysis of Cryptographic Software via Early-Terminating Multiplications. [Citation Graph (, )][DBLP]
Toward Acceleration of RSA Using 3D Graphics Hardware. [Citation Graph (, )][DBLP]
Cryptographic Side-Channels from Low-Power Cache Memory. [Citation Graph (, )][DBLP]
Program interpolation. [Citation Graph (, )][DBLP]
Bridging the gap between symbolic and efficient AES implementations. [Citation Graph (, )][DBLP]
On Software Parallel Implementation of Cryptographic Pairings. [Citation Graph (, )][DBLP]
Reassessing the TCG Specifications for Trusted Computing in Mobile and Embedded Systems. [Citation Graph (, )][DBLP]
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