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Ozcan Ozturk: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Ozcan Ozturk, Guangyu Chen, Mahmut T. Kandemir, Ibrahim Kolcu
    Compiler-Guided data compression for reducing memory consumption of embedded applications. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2006, pp:814-819 [Conf]
  2. Ozcan Ozturk, Mahmut T. Kandemir, G. Chen, Mary Jane Irwin, Mustafa Karaköy
    Customized on-chip memories for embedded chip multiprocessors. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:743-748 [Conf]
  3. Ozcan Ozturk, Feng Wang 0004, Mahmut T. Kandemir, Yuan Xie
    Optimal topology exploration for application-specific 3D architectures. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2006, pp:390-395 [Conf]
  4. Mahmut T. Kandemir, Ozcan Ozturk, Mustafa Karaköy
    Dynamic on-chip memory management for chip multiprocessors. [Citation Graph (0, 0)][DBLP]
    CASES, 2004, pp:14-23 [Conf]
  5. Ozcan Ozturk, Guangyu Chen, Mahmut T. Kandemir
    Multi-compilation: capturing interactions among concurrently-executing applications. [Citation Graph (0, 0)][DBLP]
    Conf. Computing Frontiers, 2006, pp:157-170 [Conf]
  6. Ozcan Ozturk, Guilin Chen, Mahmut T. Kandemir, Mustafa Karaköy
    Compiler-Directed Variable Latency Aware SPM Management to CopeWith Timing Problems. [Citation Graph (0, 0)][DBLP]
    CGO, 2007, pp:232-243 [Conf]
  7. Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin
    Increasing on-chip memory space utilization for embedded chip multiprocessors through data compression. [Citation Graph (0, 0)][DBLP]
    CODES+ISSS, 2005, pp:87-92 [Conf]
  8. Ozcan Ozturk, Guilin Chen, Mahmut T. Kandemir
    Optimizing code parallelization through a constraint network based approach. [Citation Graph (0, 0)][DBLP]
    DAC, 2006, pp:863-688 [Conf]
  9. Ozcan Ozturk, Mahmut T. Kandemir, I. Demirkiran, Guangyu Chen, Mary Jane Irwin
    Data compression for improving SPM behavior. [Citation Graph (0, 0)][DBLP]
    DAC, 2004, pp:401-406 [Conf]
  10. Guilin Chen, Ozcan Ozturk, Mahmut T. Kandemir, Mustafa Karaköy
    Dynamic scratch-pad memory management for irregular array access patterns. [Citation Graph (0, 0)][DBLP]
    DATE, 2006, pp:931-936 [Conf]
  11. Mahmut T. Kandemir, Feihui Li, Guilin Chen, Guangyu Chen, Ozcan Ozturk
    Studying Storage-Recomputation Tradeoffs in Memory-Constrained Embedded Processing. [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:1026-1031 [Conf]
  12. Gokhan Memik, Mahmut T. Kandemir, Ozcan Ozturk
    Increasing Register File Immunity to Transient Errors. [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:586-591 [Conf]
  13. Ozcan Ozturk, Mahmut T. Kandemir
    Nonuniform Banking for Reducing Memory Energy Consumption. [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:814-819 [Conf]
  14. Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin
    BB-GC: Basic-Block Level Garbage Collection. [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:1032-1037 [Conf]
  15. Ozcan Ozturk, Hendra Saputra, Mahmut T. Kandemir, Ibrahim Kolcu
    Access Pattern-Based Code Compression for Memory-Constrained Embedded Systems. [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:882-887 [Conf]
  16. Liping Xue, Ozcan Ozturk, Feihui Li, Mahmut T. Kandemir, Ibrahim Kolcu
    Dynamic partitioning of processing and memory resources in embedded MPSoC architectures. [Citation Graph (0, 0)][DBLP]
    DATE, 2006, pp:690-695 [Conf]
  17. Mahmut T. Kandemir, Ozcan Ozturk, Mary Jane Irwin, Ibrahim Kolcu
    Using Data Compression to Increase Energy Savings in Multi-bank Memories. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 2004, pp:310-317 [Conf]
  18. Ozcan Ozturk, Mahmut T. Kandemir
    Integer linear programming based energy optimization for banked DRAMs. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2005, pp:92-95 [Conf]
  19. Ozcan Ozturk, Mahmut T. Kandemir
    Energy management in software-controlled multi-level memory hierarchies. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2005, pp:270-275 [Conf]
  20. Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin
    Using data compression in an MPSoC architecture for improving performance. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2005, pp:353-356 [Conf]
  21. Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin, Ibrahim Kolcu
    Tuning data replication for improving behavior of MPSoC applications. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2004, pp:170-173 [Conf]
  22. Ozcan Ozturk, Mahmut T. Kandemir, Seung Woo Son, Mustafa Karaköy
    Selective code/data migration for reducing communication energy in embedded MpSoC architectures. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2006, pp:386-391 [Conf]
  23. Ozcan Ozturk, Mahmut T. Kandemir, Suleyman Tosun
    An ILP based approach to address code generation for digital signal processors. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2006, pp:37-42 [Conf]
  24. Guilin Chen, Ozcan Ozturk, Mahmut T. Kandemir, Ibrahim Kolcu
    Integrating loop and data optimizations for locality within a constraint network based framework. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2005, pp:279-282 [Conf]
  25. Ozcan Ozturk, G. Chen, Mahmut T. Kandemir, Mustafa Karaköy
    Cache miss clustering for banked memory systems. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2006, pp:244-250 [Conf]
  26. Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin, Suleyman Tosun
    Multi-Level On-Chip Memory Hierarchy Design for Embedded Chip Multiprocessors. [Citation Graph (0, 0)][DBLP]
    ICPADS (1), 2006, pp:383-390 [Conf]
  27. Suleyman Tosun, Nazanin Mansouri, Mahmut T. Kandemir, Ozcan Ozturk
    An ILP Formulation for Task Scheduling on Heterogeneous Chip Multiprocessors. [Citation Graph (0, 0)][DBLP]
    ISCIS, 2006, pp:267-276 [Conf]
  28. Hakduran Koc, Ozcan Ozturk, Mahmut T. Kandemir, Sri Hari Krishna Narayanan, Ehat Ercanli
    Minimizing energy consumption of banked memories using data recomputation. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2006, pp:358-362 [Conf]
  29. Sri Hari Krishna Narayanan, Mahmut T. Kandemir, Ozcan Ozturk
    Compiler-Directed Power Density Reduction in NoC-Based Multi-Core Designs. [Citation Graph (0, 0)][DBLP]
    ISQED, 2006, pp:570-575 [Conf]
  30. Ozcan Ozturk, Mahmut T. Kandemir
    Data Replication in Banked DRAMs for Reducing Energy Consumption. [Citation Graph (0, 0)][DBLP]
    ISQED, 2006, pp:551-556 [Conf]
  31. Ozcan Ozturk, Mahmut T. Kandemir, Ibrahim Kolcu
    Shared Scratch-Pad Memory Space Management. [Citation Graph (0, 0)][DBLP]
    ISQED, 2006, pp:576-584 [Conf]
  32. Suleyman Tosun, Ozcan Ozturk, Nazanin Mansouri, Ercument Arvas, Mahmut T. Kandemir, Yuan Xie, Wei-Lun Hung
    An ILP Formulation for Reliability-Oriented High-Level Synthesis. [Citation Graph (0, 0)][DBLP]
    ISQED, 2005, pp:364-369 [Conf]
  33. Guilin Chen, Guangyu Chen, Ozcan Ozturk, Mahmut T. Kandemir
    Exploiting Inter-Processor Data Sharing for Improving Behavior of Multi-Processor SoCs. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2005, pp:90-95 [Conf]
  34. Hendra Saputra, Ozcan Ozturk, Narayanan Vijaykrishnan, Mahmut T. Kandemir, R. R. Brooks
    A Data-Driven Approach for Embedded Security. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2005, pp:104-109 [Conf]
  35. Guangyu Chen, Feihui Li, Mahmut T. Kandemir, Ozcan Ozturk, I. Demirkiran
    Compiler-Directed Management of Leakage Power in Software-Managed Memories. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2006, pp:450-451 [Conf]
  36. Ozcan Ozturk, G. Chen, Mahmut T. Kandemir, Mustafa Karaköy
    An Integer Linear Programming Based Approach to Simultaneous Memory Space Partitioning and Data Allocation for Chip Multiprocessors. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2006, pp:50-58 [Conf]
  37. Feihui Li, Ozcan Ozturk, Guangyu Chen, Mahmut T. Kandemir, Ibrahim Kolcu
    Leakage-Aware SPM Management. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2006, pp:393-398 [Conf]
  38. Hakduran Koc, Suleyman Tosun, Ozcan Ozturk, Mahmut T. Kandemir
    Reducing Memory Requirements through Task Recomputation in Embedded Multi-CPU Systems. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2006, pp:448-449 [Conf]
  39. Guilin Chen, Ozcan Ozturk, Mahmut T. Kandemir
    An ILP-Based Approach to Locality Optimization. [Citation Graph (0, 0)][DBLP]
    LCPC, 2004, pp:149-163 [Conf]
  40. Guilin Chen, Guangyu Chen, Ozcan Ozturk, Mahmut T. Kandemir
    An Adaptive Locality-Conscious Process Scheduler for Embedded Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Real-Time and Embedded Technology and Applications Symposium, 2005, pp:354-364 [Conf]
  41. Taylan Yemliha, Guangyu Chen, Ozcan Ozturk, Mahmut T. Kandemir, Vijay Degalahal
    Compiler-Directed Code Restructuring for Operating with Compressed Arrays. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2007, pp:221-226 [Conf]
  42. Feihui Li, Guilin Chen, Mahmut T. Kandemir, Ozcan Ozturk, Mustafa Karaköy, R. Ramanarayanan, Balaji Vaidyanathan
    A Process Scheduler-Based Approach to NoC Power Management. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2007, pp:77-82 [Conf]
  43. Liping Xue, Mahmut T. Kandemir, Guilin Chen, Feihui Li, Ozcan Ozturk, R. Ramanarayanan, Balaji Vaidyanathan
    Locality-Aware Distributed Loop Scheduling for Chip Multiprocessors. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2007, pp:251-258 [Conf]
  44. Mahmut T. Kandemir, Ozcan Ozturk, Vijay Degalahal
    Enhancing Locality in Two-Dimensional Space through Integrated Computation and Data Mappings. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2007, pp:227-232 [Conf]
  45. Nikolay B. Likhanov, Ravi Mazumdar, Ozcan Ozturk
    Large Buffer Asymptotics for Fluid Queues with Heterogeneous M/G/infinity Weibullian Inputs. [Citation Graph (0, 0)][DBLP]
    Queueing Syst., 2003, v:45, n:4, pp:333-356 [Journal]
  46. Ozcan Ozturk, Ravi Mazumdar, Nikolay B. Likhanov
    Many Sources Asymptotics for Networks with Small Buffers. [Citation Graph (0, 0)][DBLP]
    Queueing Syst., 2004, v:46, n:1-2, pp:129-147 [Journal]
  47. Ismail Kadayif, Mahmut T. Kandemir, Guilin Chen, Ozcan Ozturk, Mustafa Karaköy, Ugur Sezer
    Optimizing Array-Intensive Applications for On-Chip Multiprocessors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2005, v:16, n:5, pp:396-411 [Journal]
  48. Liping Xue, Ozcan Ozturk, Mahmut T. Kandemir
    A Memory-Conscious Code Parallelization Scheme. [Citation Graph (0, 0)][DBLP]
    DAC, 2007, pp:230-233 [Conf]
  49. Hakduran Koc, Mahmut T. Kandemir, Ehat Ercanli, Ozcan Ozturk
    Reducing Off-Chip Memory Access Costs Using Data Recomputation in Embedded Chip Multi-processors. [Citation Graph (0, 0)][DBLP]
    DAC, 2007, pp:224-229 [Conf]
  50. Mahmut T. Kandemir, Taylan Yemliha, Seung Woo Son, Ozcan Ozturk
    Memory bank aware dynamic loop scheduling. [Citation Graph (0, 0)][DBLP]
    DATE, 2007, pp:1671-1676 [Conf]
  51. Ozcan Ozturk, Hendra Saputra, Mahmut T. Kandemir, Ibrahim Kolcu
    Access Pattern-Based Code Compression for Memory-Constrained Embedded Systems [Citation Graph (0, 0)][DBLP]
    CoRR, 2007, v:0, n:, pp:- [Journal]
  52. Seung Woo Son, Guangyu Chen, Ozcan Ozturk, Mahmut T. Kandemir, Alok N. Choudhary
    Compiler-Directed Energy Optimization for Parallel Disk Based Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2007, v:18, n:9, pp:1241-1257 [Journal]

  53. Profiler and compiler assisted adaptive I/O prefetching for shared storage caches. [Citation Graph (, )][DBLP]


  54. Slicing based code parallelization for minimizing inter-processor communication. [Citation Graph (, )][DBLP]


  55. Dynamic thread and data mapping for NoC based CMPs. [Citation Graph (, )][DBLP]


  56. Using dynamic compilation for continuing execution under reduced memory availability. [Citation Graph (, )][DBLP]


  57. Process variation aware thread mapping for Chip Multiprocessors. [Citation Graph (, )][DBLP]


  58. Adaptive prefetching for shared cache based chip multiprocessors. [Citation Graph (, )][DBLP]


  59. Code Scheduling for Optimizing Parallelism and Data Locality. [Citation Graph (, )][DBLP]


  60. SPM management using Markov chain based data access prediction. [Citation Graph (, )][DBLP]


  61. An ilp based approach to reducing energy consumption in nocbased CMPS. [Citation Graph (, )][DBLP]


  62. A Scratch-Pad Memory Aware Dynamic Loop Scheduling Algorithm. [Citation Graph (, )][DBLP]


  63. Optimizing Local Memory Allocation and Assignment through a Decoupled Approach. [Citation Graph (, )][DBLP]


  64. Compiler directed network-on-chip reliability enhancement for chip multiprocessors. [Citation Graph (, )][DBLP]


  65. Optimizing shared cache behavior of chip multiprocessors. [Citation Graph (, )][DBLP]


  66. Prefetch throttling and data pinning for improving performance of shared caches. [Citation Graph (, )][DBLP]


  67. Software-directed combined cpu/link voltage scaling fornoc-based cmps. [Citation Graph (, )][DBLP]


  68. Circuit-Switched Voice Services Over HSPA. [Citation Graph (, )][DBLP]


  69. Performance of VoIP services over 3GPP WCDMA networks. [Citation Graph (, )][DBLP]


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